PCIE-1756 User Manual
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3.2.2 Power On Configuration(JP1)
Default configuration after power on, and hardware reset is to set all the
isolated output channels to open status (the current of the load can’t be
sink) so that the external devices will not be damaged when the system
starts or resets. When the system is hot reset, then the status of isolated
digital output channels are selected by jumper JP1. Table 3.2 shows the
configuration of jumper JP1.
3.2.3 Channel-Freeze Function (JP2)
The PCIE-1756 provides the channel-freeze function for isolated digital
output channels. When Channel-Freeze function is enabled, all ports on
the card will be locked so that the data transmitted (from the host PC) to
the card won’t be transferred to the DO ports. Once the Channel-Freeze
function is enabled, each port status is immediately frozen into its last
valid value before the Channel-Freeze. Since the value transmitted (from
the host PC) to the card is also stored in the buffers on PC, users can call
the relative function to read back the DO channel value, this function will
determine that:
• If Channel-Freeze function is disabled, it will return the DO value on
the port
• If Channel-Freeze function is enabled, it will return the value from the
buffers on host PC
Refer to Table 3.3 for setting dry/wet contact of Channel-Freeze function.
Table 3.2: Power on configuration after hot reset (JP1)
JP1
Power on configuration after hot reset
Keep last status after hot reset
Default configuration (Default setting)
Table 3.3: Channel-Freeze Function Input Mode (JP2)
JP2
Power on configuration after hot reset
Channel-Freeze function dry contact input mode
Channel-Freeze function wet contact input mode
(Default setting)
Summary of Contents for PCIE-1756
Page 1: ...PCIE 1756 64 ch Isolated Digital I O PCI Express Card User Manual ...
Page 6: ...PCIE 1756 User Manual vi ...
Page 14: ...PCIE 1756 User Manual 6 Figure 1 1 Installation Flow Chart ...
Page 18: ...PCIE 1756 User Manual 10 ...
Page 37: ...2 APPENDIX A Specifications ...
Page 40: ...PCIE 1756 User Manual 32 ...
Page 41: ...2 APPENDIX B Block Diagrams ...
Page 42: ...PCIE 1756 User Manual 34 Appendix B Block Diagrams ...
Page 43: ...2 APPENDIX C ADAM 3951 Pin Assignment ...
Page 45: ...37 Appendix C Figure C 2 Connect to PCL 10250 CON2 ...
Page 46: ...PCIE 1756User Manual 38 ...