Advantech PCE-5026, User Manual

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PCE-5026 User Manual x
Table B.14:Hi-Definition Audio Link Connector (HDAUD1) ........ 79
B.15 SM Bus Connector (JFP2 / SNMP)......................................................... 79
Table B.15:SM Bus Connector (JFP2 / SNMP) .......................... 79
B.16 LAN1 LED Connector (LANLED1) .......................................................... 80
Table B.16:LAN1 LED Connector (LANLED1) ........................... 80
B.17 GPIO Header (GPIO1)............................................................................ 80
Table B.17:GPIO Header (GPIO1) ............................................. 80
B.18 Fixed I/O Ranges Decoded by Intel PCH ............................................... 81
Table B.18:Fixed I/O Ranges Decoded by PCH......................... 81
B.19 System I/O Ports..................................................................................... 83
Table B.19:System I/O Ports ...................................................... 83
B.20 Interrupt Assignments ............................................................................. 83
Table B.20:Interrupt Assignments .............................................. 83
B.21 1 MB Memory Map.................................................................................. 84
Table B.21:1 MB Memory Map ................................................... 84
B.22 PCI Bus Map........................................................................................... 84
Table B.22:PCI Bus Map ............................................................ 84
Appendix C Programming the GPIO .................... 85
C.1 Supported GPIO Register ....................................................................... 86
C.2 GPIO Registers....................................................................................... 86
C.3 GPIO Example Program-1 ...................................................................... 86