ASMB-977 Startup Manual 3
*Power button pin is located in Pin 3 & 6 of front panel
connector.
The computer is supplied with a battery-powered real time
clock circuit. There is a danger of explosion if battery is
incorrectly replaced. Replace only with same or equivalent
type recommended by the manufacturer. Discard used bat-
teries according to manufacturer’s instructions.
The device complies with the requirements of FCC Class A,
Part 15 of the FCC rules. Operation is subject to the follow-
ing two conditions:
1. This device may not cause harmful interference.
2. This device must accept any interference received,
including interference that may cause undesired opera-
tion.
JCMOS1/JME1: CMOS clear/ME update function
Closed pins
Result
1-2
Keep CMOS data/Disable ME update*
2-3
Clear CMOS data/Enable ME update
*: Default
Keep CMOS data/Disable ME update Clear CMOS data/Enable ME update
JFP1, JFP2
Pin.3
#PWR_SW
Pin.6
GND
Pin.9
#RST_SW
Pin.12
GND
Pin.8, Pin.11
HWM_SMB_DATA, HWM_SMB_CLK
1
2
3
1
2
3
Jumpers and Connectors (Cont.)
Figure 1: Board Layout: Jumper and Connector Locations
PCIEX8
_SLOT1
PCIEX16
_SLOT2
PCIEX8_
SLOT7
PCIEX16
_SLOT4
PCIEX8
_SLOT5
PCIEX16
_SLOT6
BMC_LAN
USB3C1
COM1
LAN1_2
REAR_FAN
VGA
LAN3_4
DIMML1
DIMMK1
DIMMJ1
DIMMI1
DIMMN1
DIMMO1
DIMMP1
DIMMM1
CPU1
CPU0
DIMMH1
DIMMG1
DIMMF1
DIMME1
DIMMB1
DIMMC1
DIMMD1
DIMMA1
ATX12V3
ATX12V4
PMBUS1
ATXPWR1
CPUFAN1
COM2
HDAUD1
KBMS1
BMC_SPI1
PSON1
ESPI1
SYS_LED1
SGPIO2
SGPIO1
JTHR_SEL1
USB3H1
JFP1/2/3
LANLED1
JACSE1
CPUFAN0
SYSFAN0 SYSFAN1 SYSFAN2 SYSFAN3
ATX12V1 ATX12V2
SATA0~3
SATA4~7
BIOS_SKT1_FLASH
BH2
PCIEX16
_SLOT8
PCIEX16
_SLOT9
PCIEX8_
SLOT10
PCIEX8_
SLOT11
SATA0
SMBUS1
SPI_CN1
USB2A1
GPIO1
Slot12V1
Slot12V2
EX_THR1
JWDT1
M2_2280_1
M2_2280_2
JCOMS1
EC_SMBUS1
JME1
SYSFAN4
SYSFAN5
Jumpers and Connectors (Cont.)
Board Layout
Declaration of Conformity