Advantech ASMB-825-00A1E, User Manual, Page: 70 / 122

ASMB-825 User Manual 62
 Per-Socket Configuration
Use this to select how many processor cores you want to activate when you are
using a dual or quad core processor.
 Hyper-threading [All]
To "Enable or Disable" Intel Hyper Threading technology.
 Execute Disable Bit
To "Enable or Disable" the Execute Disable Bit feature. The Optimal and Fail-
Safe default setting is Enabled. If Disabled is selected, the BIOS forces the XD
feature flag to always return to 0.
 VMX
Enable or Disable Intel Virtual Machine Extensions (VMX) for IA-32 processors
that support Intel® Vanderpool Technology
 Enable SMX
To "Enable or Disable" Safer Mode Extensions. Safer Mode Extensions (SMX)
provide a means for system software to launch an MLE and establish a mea-
sured environment within the platform to support trust decisions by end users.
 Hardware Prefetcher
Hardware Prefetcher is a technique that fetches instructions and/or data from
memory into the CPU cache memory well before the CPU needs it, so that it can
improve the load-to-use latency.
 Adjacent Cache Prefetch
The Adjacent Cache-Line Prefetch mechanism, like automatic hardware
prefetch, operates without programmer intervention. When enabled through the
BIOS, two 64-byte cache lines are fetched into a 128-byte sector, regardless of
whether the additional cache line has been requested or not.
 DCU Streamer Prefetcher
Enable prefetch of next L1 data line based upon multiple loads in same cache
line.