ADT ADZBT1HP Hardware User Manual Download Page 8 | Manualshive

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ADT ADZBT1HP Hardware User Manual Download Page 8

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࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫

ADZBT1HP Hardware User Manual

3.2 Zynq FPGA Configration

Zynq FPGA

ࡢ

Configration

ࡣࠊ

QSPI/JTAG/SDCard

ࡢ㸱ࡘࡢ

Boot Mode

࠿ࡽ㑅ᢥ࡛ࡁࡲࡍࠋ

Mode

ࡢษࡾ᭰࠼ࡣࠊ

DIP_SW3

㸦

M0

㸧

ࠊ

DIP_SW4

㸦

M1

㸧࡟ࡼࡾษࡾ᭰࠼ࡲࡍࠋ

DIP SW

ࡢタᐃ⾲ࢆ௨ୗ࡟♧ࡋࡲࡍࠋ

タᐃ

Mode

DIP SW4

㸦

M1

㸧

DIP SW3

㸦

M0

㸧

QSPI Mode

OFF

OFF

JTAG Mode

OFF

ON

SD Card Mode

ON

OFF

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Summary of Contents for ADZBT1HP

Page 1: ...1 17 ࢻࣂࣥࢫࢹࢨ ࣥࢸࢡࣀࣟࢪ ᰴᘧ ADZBT1HP Hardware User Manual Hardware User Manual Version 1 1 ...

Page 2: ...2 17 ࢻࣂࣥࢫࢹࢨ ࣥࢸࢡࣀࣟࢪ ᰴᘧ ADZBT1HP Hardware User Manual Revision History Version Date Comment 1 0 2020 3 16 ᪂つసᡂ 1 1 2020 8 28 PS 㒊 CLK ኚ ࠊJ1 J2 ࢥࢿࢡࢱᆺ ኚ ...

Page 3: ... Overview 4 2 Block Diagram 5 3 ᶵ ㄝ 6 3 1 Power Supply 7 3 2 Zynq FPGA Configration 8 3 3 JTAG I F 10 3 4 QSPI Flash 10 3 5 DDR Memory 10 3 6 USB Serial Port 11 3 7 MicroSD Slot 11 3 8 Clock Source 11 3 9 User I O 12 3 10 LED 15 3 11 DIP SW 16 4 Appendix 17 ...

Page 4: ...B Instruction 32KB Data per processor L2 Cache 512KB On Chip Memory 256KB DRAM DDR3L 512MB QSPI Flash 512Mb 64MB UART Micro USB UART Debug I F㸦USB Micro B㸧 SD Card SD Card x 1 Connect I O 133 Pin User I O I O ࡣ௨ୗࡢ ᣑᙇྍ ࠋ USB2 0 OTG Gigabit Ether UART CAN 2 0B I2C SPI GPIO User I F Power DC In 5V㸦ᣑᙇࢥࢿࢡࢱ ࡽ౪ 㸧 Micro USB 5V Programmable Logic Logic Cells 28K Look up Tables LUTs 17 600 Flip Flop 35 200 ...

Page 5: ...㼞㻌㼟㼛㼡㼞㼏㼑㻿㼑㼘㼑㼏㼠㻡㼂㻡㼂㻰㻯㻛㻰㻯㻿㻰㻌㻯㼍㼞㼐㻯㼛㼚㼚㼑㼏㼠㼛㼞㻞 Zync FPGA XC7Z010 CLG400 䠄㻭㻾㻹㻌㻯㼛㼞㼑㼠㼑㼤㻙㻭㻥㻼㼞㼛㼏㼑㼟㼟㼛㼞㻌䠇㻌㻲㻼㻳㻭㻌㼁㼟㼑㼞㻌㻸㼛㼓㼕㼏䠅㻯㼛㼚㼚㼑㼏㼠㼛㼞㻝㼀㼛㻌㻯㼛㼙㼜㼡㼠㼑㼞㻰㻰㻾㻟㻸㻡㻝㻞㻹㻮㻾㼑㼟㼑㼠㻌㻮㼡㼠㼠㼛㼚㻼㼛㼣㼑㼞㻌㻸㻱㻰㻰㼛㼚㼑㻌㻸㻱㻰㻜㻚㻢㻣㻡㼂䠍㻚㻜㼂㻝㻚㻤㼂㻝㻚㻟㻡㼂㻟㻚㻟㼂㻮㼛㼛㼠㻌㻹㼛㼐㼑㻌㻿㼃㻻㻿㻯㻌㻟㻟㻹㻴䡖㻼㻿㒊㻼㻸㒊㻼㻿㒊䠇㻼㻸㒊ಙྕ 㻢㻣㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻㻼㻸㒊ಙྕ䠖㻢㻢㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻㻶㼀㻭㻳ಙྕ䝁䝛䜽䝍㻭㻰㼆㻮㼀㻝ᅇ ᵓᡂ 㻡㼂እ㒊౪ 䠄㻿㼁㻮ᇶᯈ䛛䜙䠅㻟㻚㻟㼂䚸㻝㻚㻤㼂౪ 㻡㼂እ㒊౪ 䠄㻿㻰㻛㻲㼘㼍㼟㼔㻛㻶㼀㻭㻳䠅 ...

Page 6: ...6 17 ࢻࣂࣥࢫࢹࢨ ࣥࢸࢡࣀࣟࢪ ᰴᘧ ADZBT1HP Hardware User Manual 3 ᶵ ㄝ ADZBT1 ࡢᶵ ࡘ ࠊ௨ୗ ㄝ ࡋࡲࡍࠋ ...

Page 7: ... ࡁࡲࡍࠋ 㟁ࡢษࡾ ࡣࠊࢪࣕࣥࣃ ࡼࡾษࡾ ࡲࡍࠋ ձMicro USB ࡽ 5V 㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃ᥋ 㼁㻿㻮㻰㻯㻡㼂㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂㻭㻰㼆㻮㼀㻝㻰㻯㻛㻰㻯㻹㼕㼏㼞㼛㻌㼁㻿㻮㻶㼡㼚㼜㼑㼞䝁䝛䜽䝍䠎䝁䝛䜽䝍䠍 ղࢥࢿࢡࢱ 㸦SUB ᇶᯈ 㸧5V 㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋ 㻭㻯䜰䝎䝥䝍䞊㻰㻯㻡㼂㻡㼂㻿㼁㻮ᇶᯈ 㻝㻚㻤㼂㻔㻜㻚㻟㻭㻌㻹㻭㼄䠅㻟㻚㻟㼂㻔㻝㻚㻞㻭㻌㻹㻭㼄䠅㻝㻚㻤㼂㻛㻟㻚㻟㼂㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂㻭㻰㼆㻮㼀㻝㻰㻯㻛㻰㻯㻹㼕㼏㼞㼛㻌㼁㻿㻮㻶㼡㼚㼜㼑㼞䝁䝛䜽䝍䠎䝁䝛䜽䝍䠍 ճୖグ௨እ እ㒊 ࡽ 5V 㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋ 5V GND ࢆ᥋ ࡋ ᥋౪ ࡍࡿࡇ ࡀྍ ࡗ ࡲࡍࠋ ...

Page 8: ...ual 3 2 Zynq FPGA Configration Zynq FPGA ࡢ Configration ࡣࠊQSPI JTAG SDCard ࡢ㸱ࡘࡢ Boot Mode ࡽ㑅ᢥ ࡁࡲࡍࠋ Mode ࡢษࡾ ࡣࠊDIP_SW3㸦M0㸧 ࠊDIP_SW4㸦M1㸧 ࡼࡾษࡾ ࡲࡍࠋ DIP SW ࡢタᐃ ࢆ௨ୗ ࡋࡲࡍࠋ タᐃ Mode DIP SW4㸦M1㸧 DIP SW3㸦M0㸧 QSPI Mode OFF OFF JTAG Mode OFF ON SD Card Mode ON OFF ...

Page 9: ...QSPI Boot Mode ADZBT1 ࡣࠊQuad SPI Serial Flash ࢆᐇ ࡋ ࡲࡍࠋ ࢻࡢ㟁 ືᚋ ࠊQSPI ಖᏑࡉࢀ ࡿ ࢪࢆㄞࡳ ࢇ ࠊ ືࡍࡿࡇ ࡀ ࡁࡲ ࡍࠋ QSPI Boot Mode ࡢタᐃ ᡭ㡰㸸 1 DIP_SW3 ON ࡋ ࠊJTAG Mode ࡋࡲࡍࠋ 2 ࢻࡢ㟁 ࢆ᥋ ࡋࡲࡍࠋ 3 Xilinx JTAG ࢲ ࣥࣟ ࢻࢣ ࣈࣝ ࡽࠊXilinx SDK ࢆ ࡗ QSPI ࡁ ࡳࡲࡍࠋ 4 ࡁ ࡳᚋࠊDIP_SW3 OFF ࡋ ࠊQSPI Mode ࡋࡲࡍ 5 ࢻࡢ㟁 ࢆ OFF ࡋࡲࡍࠋ 6 ᗘ㟁 ࢆ ON ࡍࡿ ࠊQSPI ᱁ ࡉࢀ ࡿ ࢪࡀㄞࡳฟࡉࢀ ࠊ FPGA ࢥࣥࣇ ࢢࣞ ࢩࣙࣥࡀ ࢃࢀࡲࡍࠋ ڦ SD_Card Boot Mode SD Card ᱁ ࡉࢀ ࡿ Boot ࢹ ࢱࢆ ࡗ Boot ࡍࡿࡇ ࡀ ࡁࡲࡍࠋ SD Ca...

Page 10: ...SL 210203 06㸧ࢆ ࡋ ࡲࡍࠋ ಙྕ㓄 ࡣ௨ୗࡢࡼ ࡾࡲࡍࠋ 3 4 QSPI Flash QSPI I F ࡣࠊ3 3V ᑐᛂࡢࠊMicron㸸MT25QL512㸦64MB㸧ࢆ ࡋ ࡲࡍࠋ 㟁 ᢞධᚋࡢࠊFirst Stage Loader ࢆಖᏑࡍࡿࡓࡵ ࡉࢀࡲࡍࠋ FPGA ࡢ Pin 㓄 ࡣ௨ୗ グ ࡋࡲࡍࠋ 㻹㻵㻻㻞㻹㻵㻻㻝㻹㻵㻻㻟㻹㻵㻻㻠㻹㻵㻻㻡㻹㻵㻻㻢㻲㻼㻳㻭㻯㻿㻰㻜㻰㻝㻰㻞㻰㻟㻯㻸㻷㻽㻿㻼㻵 3 5 DDR Memory DDR Memory ࡣࠊDDR3L Micron㸸MT41K256M16㸦512MB㸧ࢆ ࡋ ࡲࡍࠋ ...

Page 11: ...ࡢࢥࢿࢡࢱᙧ 㸧㼁㻿㻮䋽㼁㻭㻾㼀 ኚ 㻲㻼㻳㻭㻹㼕㼏㼞㼛㼁㻿㻮㼀㼄㻰㻾㼄㻰㻹㻵㻻㻠㻥㻹㻵㻻㻠㻤 3 7 MicroSD Slot Micro SD ࡣࠊ2nd Boot ࡋࡲࡍࠋ Linux ࡢ OS ࡢ ࢪࢆ MicroSD ᱁ ࡋ ࡃࡇ ࠊBoot Linux ືࡉࡏࡿࡇ ࡀ ࡁࡲࡍࠋ FPGA ࡢ Pin 㓄 ࡣ௨ୗ グ ࡋࡲࡍࠋ 㻹㻵㻻㻠㻣㻹㻵㻻㻠㻞㻹㻵㻻㻠㻝㻹㻵㻻㻠㻜㻹㻵㻻㻠㻟㻹㻵㻻㻠㻠㻹㻵㻻㻠㻡㻲㻼㻳㻭㻯㻰㻰㻜㻯㻹㻰㻯㻸㻷㻰㻝㻰㻟㻿㻰㻌㻯㻭㻾㻰㻰㻞 3 8 Clock Source 33 3333MHz Oscillator ࢆᐇ ࡋࠊFPGA ࡢ PS 㒊ࠊPL 㒊 ྛࠎධຊࡋ ࡲࡍࠋ 㻲㻼㻳㻭㻼㻿㼋㻯㻸㻷㼁㻝㻤㻟㻟㻚㻟㻟㻟㻟㻹㻴㼦䠄㻼㻸ഃ㻯㻸㻷㻕㻟㻟㻚㻟㻟㻟㻟㻹㻴㼦 ...

Page 12: ... Port ྡ Pin ྕ Pin ྕ Port ྡ 1 3 3V 2 3 3V 3 3 3V 4 3 3V 5 3 3V 6 3 3V 7 3 3V 8 3 3V 9 GND 10 GND 11 A10 PS_MIO37 OTG_data5 12 A12 PS_MIO34 OTG_data2 13 A11 PS_MIO36 OTG_clk 14 B13 PS_MIO50 ETH Interrupt 15 GND 16 GND 17 B9 PS_MIO51 ETH PHY Reset 18 A14 PS_MIO32 OTG_data0 19 C18 PS_MIO39 OTG_data7 20 C16 PS_MIO20 OTG_data4 21 GND 22 GND 23 F12 PS_MIO35 OTG_data3 24 E16 PS_MIO31 OTG nxt 25 C15 PS_MIO...

Page 13: ... 59 B5 PS_MIO9 60 E9 PS_MIO10 61 C6 PS_MIO11 62 D9 PS_MIO12 63 JTAG_nRST 㸦SRST ࡢ SW ࢆ᥋ 㸧 64 V13 IO_L3N_T0_DQS_34 65 E6 PS_MIO0 66 T11 IO_L1P_T0_34 67 U12 IO_L2N_T0_34 68 U13 IO_L3P_T0_DQS_PUDC_B_34 69 T12 IO_L2P_T0_34 70 T10 IO_L1N_T0_34 71 W15 IO_L10N_T1_34 72 U15 IO_L11N_T1_SRCC_34 73 W14 IO_L8P_T1_34 74 U14 IO_L11P_T1_SRCC_34 75 Y14 IO_L8N_T1_34 76 T16 IO_L9P_T1_DQS_34 77 V15 IO_L10P_T1_34 78 T...

Page 14: ..._35 34 A20 IO_L2N_T0_AD8N_35 35 GND 36 GND 37 E17 IO_L3P_T0_DQS_AD1P_35 38 D19 IO_L4P_T0_35 39 D18 IO_L3N_T0_DQS_AD1N_35 40 D20 IO_L4N_T0_35 41 GND 42 GND 43 E18 IO_L5P_T0_AD9P_35 44 F16 IO_L6P_T0_35 45 E19 IO_L5N_T0_AD9N_35 46 F17 IO_L6N_T0_VREF_35 47 GND 48 GND 49 M19 IO_L7P_T1_AD2P_35 50 M17 IO_L8P_T1_AD10P_35 51 M20 IO_L7N_T1_AD2N_35 52 M18 O_L8N_T1_AD10N_35 53 GND 54 GND 55 L19 IO_L9P_T1_DQS_...

Page 15: ...P_35 85 G15 IO_L19N_T3_VREF_35 86 J14 IO_L20N_T3_AD6N_35 87 GND 88 GND 89 G14 IO_0_35 90 J15 IO_25_35 91 N15 IO_L21P_T3_DQS_AD14P_35 92 L14 IO_L22P_T3_AD7P_35 93 N16 IO_L21N_T3_DQS_AD14N_35 94 L15 IO_L22N_T3_AD7N_35 95 GND 96 GND 97 M14 IO_L23P_T3_35 98 K16 IO_L24P_T3_AD15P_35 99 M15 IO_L23N_T3_35 100 J16 IO_L24N_T3_AD15N_35 3 10 LED ADZBT1 ࡣ User LED ࢆ㸱ࡘᐇ ࡋ ࡲࡍࠋ FPGA ࡢ Pin 㓄 ࡣ௨ୗ グ ࡋࡲࡍࠋ 㻲㻼㻳㻭㻵㻻㼋㻸㻞㻠...

Page 16: ...16 17 ࢻࣂࣥࢫࢹࢨ ࣥࢸࢡࣀࣟࢪ ᰴᘧ ADZBT1HP Hardware User Manual 3 11 DIP SW ADZBT1 ࡣ User DIP SW ࢆ㸰ࡘᐇ ࡋ ࡲࡍࠋ FPGA ࡢ Pin 㓄 ࡣ௨ୗ グ ࡋࡲࡍࠋ 㻲㻼㻳㻭㻵㻻㼋㻸㻞㻟㻼㼋㼀㻟㼋㻟㻠㻵㻻㼋㻸㻞㻟㻺㼋㼀㻟㼋㻟㻠 ...

Page 17: ...ࡃࡔࡉ ࠋ ADZBT1 ࢆ ࡓ㛤Ⓨ ࡓࡾࠊࢧࣥࣉࣝࢹࢨ ࣥࢆᥦ౪ࡋ ࡾࡲࡍࠋ ࢸࢫࢺ ࡢࢧࣥࣉࣝࢹࢨ ࣥ ࡾࡲࡍࡢ ࠊ〇ရ ࡉࢀࡿሙྜ ࡣࠊࣘ ࢨ ᵝࡢ ࡈ ୗࡉ ࡲࡍࡼ 㢪 ࡋࡲࡍࠋ ࣝ ࣇࢻ ڦ 㸸 adzbt1 400p zip ࣥ ࢨࢹࣝࣉࣥࢧڦ 㸦㸯㸧 ࣉࣟࢪ ࢡࢺࣇ ࣝ 㸸 ADZBT1_400p_Ref xpr zip 㸦㸰㸧 bsp 㸸 adzbt1hp_ref bsp 㸦㸱㸧 ROM ࢹ ࢱ 㸸 BOOT BIN image ub system dtb zynq_fsbl elf 㸦㸲㸧RootFileSystem 㸸 ubuntu18 04LTS_RootFS tar gz 㛤Ⓨ ቃࠚ Vivado 2018 3 Petalinux 2018 3 Ubuntu 16 04 LTS ௨ୖ 㸫 ...

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