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Chapter 3

Hardware

28

Reference Manual

ReadyBoard 620

Miscellaneous

Utility Interface

•

Power-On – This control signal is provided externally through a switch by connecting ground to pin 1
on the Utility connector (J16).

•

Reset Switch – This signal is provided externally through a switch by connecting ground to pin 3 on the
Utility connector (J16). This signal line is shared with Reset Switch (SW1).

•

PC Beep Speaker – The output signals from the I/O Hub (CS5536) and the Super I/O (W83627HF) are
fed to pin 5 of the Utility connector (J16) through an OR circuit, and in conjunction with the +5V (pin
4), drives an external PC Beep speaker. The PC Beep speaker signal from the I/O Hub is also fed to the

on-board Audio CODEC to provide a PC Beep signal for the Line Out connections.

Note:

The shaded areas denote power or ground.

Reset Switch

The reset switch (SW1), located on the board edge, provides an internal reset signal (momentary ground) to

the ReadyBoard 620. The reset switch shares the reset line with pin 3 of the Utility interface (J16).

User GPIO Signals

The ReadyBoard 620 provides eight GPIO pins for custom use, and the signals are routed to the J4
connector. ADLINK has provided sample applications showing how to use the GPIO pins in the

Miscellaneous Source Code Examples on the ReadyBoard 620 Support Software DVD.

For more information about the GPIO pin operation, refer to the datasheet specifications or Programming
Manual for the Super I/O (W83627HF) controller at:

http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83627HF_F_HG_Ga.pdf

lists the GPIO pin/signals on a 10-pin, 2 rows, odd/even (1, 2) with 2 mm pin spacing.

Table 3-10. Utility Interface Pin/Signal Descriptions (J16)

Pin #

Signal

Description

1

PWRON

Power-On input (connect between pins 1 & 2)

2

GND

Ground

3

RST_SW

Reset Switch input or output (connect between pins 3 & 2)

4

+5V

+5 Volts

5

Speaker

PC Beep S Output (connect between pins 5 & 4)

Table 3-11. User GPIO Signals Pin/Signal Descriptions (J4)

Pin #

Signal

Description

1

GND

Ground

2

VCC

+5 Volts DC +/ 5%

3

GPIO4

User defined

4

GPIO5

User defined

5

GPIO6

User defined

6

GPIO7

User defined

7

GPIO0

User defined

8

GPIO1

User defined

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Summary of Contents for ReadyBoard 620

Page 1: ...ReadyBoard 620 Single Board Computer Reference Manual P N 5001820B Revision B ...

Page 2: ...esign and implement prototype computer equipment ii Reference Manual ReadyBoard 620 TRADEMARKS CoreModule and the Ampro logo are registered trademarks and ADLINK Little Board LittleBoard MightyBoard MightySystem MilSystem MiniModule ReadyBoard ReadyPanel ReadySystem and RuffSystem are trademarks of ADLINK Technology Inc All other marks are the property of their respective companies REVISION HISTOR...

Page 3: ...r 3 Hardware 15 Overview 15 Interrupt Channel Assignments 16 Memory Map 17 I O Address Map 17 Floppy Parallel Interface 18 Serial Interfaces 20 USB Interfaces 22 USB 2 0 Support 22 Legacy USB Support 22 Secondary USB2 and USB3 23 Audio Interface 23 Video Interfaces 24 CRT features 24 LVDS and TTL Flat Panel features 24 TTL Flat Panel Interface 25 LVDS Flat Panel Interface 27 Miscellaneous 28 Utili...

Page 4: ...List of Tables Table 2 1 Major Integrated Circuit Description and Function 8 Table 2 2 Connector Descriptions 9 Table 2 3 Jumper Settings 11 Table 2 4 Weight and Footprint Dimensions 12 Table 2 5 Power Supply Requirements 12 Table 2 6 Environmental Requirements 14 Table 3 1 Interrupt Channel Assignments Typical 16 Table 3 2 Memory Map 17 Table 3 3 I O Address Map 17 Table 3 4 Floppy Parallel Inter...

Page 5: ...nce Manual v Table 3 15 Power In Interface Pin Signal Descriptions J2 32 Table 3 16 Power On Connector Pin Signal Descriptions J1 32 Table 3 17 Wake Up Activities and Conditions 34 Table A 1 Technical Support Contact Information 39 ...

Page 6: ...Contents vi Reference Manual ReadyBoard 620 ...

Page 7: ...e helpful for you successfully to complete your design Most of this material is also available on the Ampro By ADLINK web site in the InfoCenter The InfoCenter was created for embedded system developers to share ADLINK s knowledge insight and expertise Specifications EPIC Specification Revision 1 0 March 22 2004 Web site http www ampro com RP EPIC_Specification_v1 0 pdf PC 104 Specification Revisi...

Page 8: ...W83627HF chip used for the Super I O controller Web site http www winbond usa com products winbond_products pdfs PCIC W83627HF_F_HG_Ga pdf Fintek and the F81216D chip used for the Secondary I O LPC UART controller 48 pin Web site http www fintek com tw eng Intel Corporation and the 82551QM used for the Ethernet 1 and Ethernet 2 controllers Web site http www intel com design network datashts 82551Q...

Page 9: ...y and modular addition of functions such as Firewire or wireless networking not usually contained in standard product offerings The EBX system expansion is based on popular existing industry standards PC 104 PC 104 Plus and PCI 104 PC 104 places the ISA bus on compact 3 6 x 3 8 modules with self stacking capability PC 104 Plus adds the power of a PCI bus to PC 104 while retaining the basic form fa...

Page 10: ... to accept PC 104 and PC 104 Plus cards that offer compact self stacking modular expandability for additional system functions The PCI bus operates at 33 MHz clock speed and if included as an option the ISA bus operates at 8 MHz clock speed See Figure 2 1 Among the many enhancements provided on the ReadyBoard 620 to ensure system operation and application versatility are a watchdog timer serial co...

Page 11: ...6 byte FIFO buffer Supports full modem capability on three of the four ports Supports RS 232 operation on all four ports Supports RS 485 or RS 422 operation on two ports serial 3 4 COM3 COM4 Supports programmable word length stop bits and parity Supports 16 bit programmable baud rate generator USB Ports Provides two root USB hubs Provides four USB ports Provides two standard USB connectors USB 0 1...

Page 12: ... bit non interleaved on 30 pin header Infrared Interface Provides IrDA v1 1 signals on separate connector J21 Supports HPSIR and ASKIR infrared modes Supports IR mode select from the Super I O chip Keyboard Mouse Interface Provides PS 2 keyboard shared with mouse interface Provides PS 2 mouse shared with keyboard interface Provides shared over current fuse Miscellaneous Provides real time clock RT...

Page 13: ...lus PC 104 ISA Bridge Connector Connector PCI Bus IrDA 1 1 Floppy Parallel AC 97 CODEC ALC203 LPC I O F81216D COM4 USB Port 4 USB Port 3 USB Port 2 USB Port 1 USB 2 0 Super I O W83627HF COM1 COM2 AC 97 Link Ext SMBus 512kB ROM BIOS Ethernet Ethernet Controller Controller 82551QM 82551QM CRT VGA LVDS LCD Transmitter TTL LCD Magnetics RJ45 GPIO User Defined I O Hub CS5536 Southbridge IDE P ATA Compa...

Page 14: ... Integrated CPU memory and video I O Hub B1 AMD CS5536 Southbridge functions provides some of the standard I O functions I O Functions Super I O U6 Winbond Electronics Corp W83627HF Super I O controller provides remaining standard I O functions I O Functions LPC I O UART Controller U18 on back of the board Fintek F81216D LPC controller for Serial Ports 3 and 4 COM 3 and COM4 UART I O Controller Et...

Page 15: ...nnector Descriptions Jack Signal Device Description BTI RTC battery B1 2 pin 1 25mm 0 049 header for battery input DIMM1 Memory on back of the board 200 pin socket for DDR SDRAM SODIMM D5 IDE LED Yellow and green IDE and power activity indicators SW1 Reset switch 4 pin 5V momentary push button switch J1 Power On 3 pin 2 mm header for Power On and 5V standby voltages J2 Power In 4 pin 5 08 mm 0 200...

Page 16: ...ower and reset buttons and speaker J17 USB 2 3 10 pin 2 mm 0 079 header provides USB2 and USB3 output J18 Floppy Parallel Port 26 pin 2 mm 0 079 header for floppy parallel port interface J19 IDE 44 pin 2 mm 0 079 header for IDE interface J20 SMBus 5 pin 2 mm 0 079 SMBus header for external device connection J21 IrDA 5 pin header for infrared signals J22 A B C D PC 104 Plus 120 pin 2 mm 0 079 conne...

Page 17: ... or PCI 104 specifications some pins in the connectors headers are missing or have keys blocking the pins Table 2 3 Jumper Settings Jumper Installed Enabled Removed Enabled JP1 Not Used Reserved Reserved Default JP2 Compact Flash Master pins 1 2 Slave removed Default JP3 CF Voltage Select Enable 3 3V pins 1 2 Default Enable 5V pins 2 3 JP4 LCD Voltage Type Enable 3 3V pins 1 2 Default Enable 5V pi...

Page 18: ...MB Compact Flash one external power USB hard drive one external power USB CD ROM drive JP6 COM3 RS485 Termination pins 1 2 No Termination removed Default JP6 COM4 RS485 Termination pins 3 4 No Termination removed Default JP7 CMOS Reset Normal pins 1 2 Default Clear Reset CMOS pins 2 3 Table 2 4 Weight and Footprint Dimensions Parameter Dimensions NOTE Overall height is measured from the upper boar...

Page 19: ... 370 1 875 1 350 0 338 0 624 0 624 0 068 0 696 All dimensions in this drawing section are in inches and are approximate Board thickness is 0 062 inches 28 270 165 1 5 080 Mounting Hole Center at 4 Corners 8 763 30 835 30 810 16 256 3 048 9 169 7 899 12 700 1 295 12 623 13 893 1 701 2 54 1 391 15 290 16 510 14 071 12 954 1 828 6 985 6 985 4 572 9 906 2 032 9 398 47 625 34 29 8 588 15 849 15 849 1 7...

Page 20: ... regulators are the sources of heat on the board The ReadyBoard 620 is designed to operate at its maximum CPU speed of 500 MHz Only the CPU requires a heatsink but no fan Table 2 6 Environmental Requirements Parameter Temperature Humidity Model Operating Storage Extended Optional Operating Non operating 500 MHz Geode LX800 0 to 60 C 32 to 140 F 20 to 75 C 4 to 167 F 20 to 70 C 4 to 158 F 5 to 90 r...

Page 21: ...BIOS Recovery Temperature Monitoring Remote Access Serial Console Watchdog timer Power In Interface Power On Interface Power and Sleep States NOTE ADLINK Technology Inc only supports the features options tested and listed in this manual The main integrated circuits ICs used in the ReadyBoard 620 may provide more features or options than are listed for the ReadyBoard 620 but some of these IC featur...

Page 22: ...cade X COM1 O D COM2 D O COM3 O O O D COM4 O O D O Floppy D Parallel O D RTC X IDE D O Math Coprocessor X PS 2 Mouse X PCI INTA Automatically Assigned PCI INTB Automatically Assigned PCI INTC Automatically Assigned PCI INTD Automatically Assigned USB Automatically Assigned VGA Automatically Assigned Ethernet Automatically Assigned NOTE The IRQs for the Ethernet Video and USB are automatically assi...

Page 23: ...d Memory If on board VGA is enabled then the amount of memory assigned is subtracted from extended memory FFF80000h FFFFFFFFh System Flash Table 3 3 I O Address Map Address hex Subsystem 000 00F Primary DMA Controller 020 021 Master Interrupt Controller 040 043 Programmable Interrupt Timer Clock Timer 060 06F Keyboard Controller 070 07F CMOS RAM NMI Mask Reg RT Clock 080 09F DMA Page Registers 092...

Page 24: ... 3 4 Floppy Parallel Interface Pin Signal Descriptions J18 Pin Signal Description 1 Strobe Parallel Strobe This is an output signal used to strobe data into the printer I O pin in ECP EPP mode 2 PD0 INDEX Parallel Port Data 0 These pins 0 to 7 provide parallel port data signals Floppy Index Detects head positioned over the beginning of a track 3 PD1 TRK0 Parallel Port Data 1 See pin 2 PD0 for more...

Page 25: ...o Feed This is a request signal into the printer to automatically feed one line after each line is printed Floppy Drive Density Select Bit 0 15 ERR HDSEL Parallel Error This is a error status output signal from the printer A Low State indicates an error condition on the printer Floppy Head Select Selects the side for Read Write operations 0 side 1 1 side 0 16 PINIT DIR Printer Initialize This sign...

Page 26: ...2 and modem support To implement the two wire RS 485 mode on either serial port you must tie the equivalent pins together for each port For example on Serial Port 3 tie pin 3 RX3 to 5 TX3 and pin 4 TX3 to 6 RX3 at the Serial B interface connector J5 As an alternate tie pin 2 to pin 3 and pin 7 to pin 8 at the DB9 serial connector for Serial Port 3 See Figure 3 1 Refer to the following table for th...

Page 27: ...al Ready 3 Indicates Serial port 3 is powered initialized and ready Used as hardware handshake with DSR3 for overall readiness to communicate 8 RI3 Ring Indicator 3 Indicates external serial communications device is detecting a ring condition Used by software to initiate operations to answer and open the communications channel 9 GND Ground 10 NC Not connected 11 DCD4 Data Carrier Detect 4 Indicate...

Page 28: ...list provides some of the ReadyBoard 620 s EHCI features One EHCI host controller for all four USB ports on connectors J17A B and or J13A B Support for USB v2 0 Specification Over current fuses located on the board where USB0 and USB1 share a single fuse F3 and USB2 and USB3 share a single fuse F2 Legacy USB Support The I O Hub supports two USB Open Host Controller Interfaces OHCI and each Host Co...

Page 29: ...plex performance Independent variable sampling rate Stereo Left and Right Line In Stereo Left and Right Line Out Microphone Mono In PC Beep speaker signal is also fed to the CODEC for the Line Out Left and Right channels Table 3 7 describes the Audio interface pin signals on 16 pins 2 rows odd even 1 2 with 2 mm pin spacing Note The shaded area denotes power or ground Table 3 6 USB 2 3 Interface P...

Page 30: ... 350 MHz 24 bit RAMDAC to drive a progressive scan analog monitor and outputs to three 8 bit DACs provide the R G and B signals to the monitor Support resolutions up to 1920 x 1440 Support a maximum allowable video frame buffer size of 254 MB UMA Unified Memory Architecture LVDS and TTL Flat Panel features Supports 3 3V 5V or 12V Output to both LVDS and TTL flat panels through a 24 bit interface S...

Page 31: ...t Panel Data Output R0 18 FP20 Flat Panel Data Output R4 19 FP17 Flat Panel Data Output R1 20 FP18 Flat Panel Data Output R2 21 FP19 Flat Panel Data Output R3 22 FP14 Flat Panel Data Output G6 23 FP13 Flat Panel Data Output G5 24 FP12 Flat Panel Data Output G4 25 FP15 Flat Panel Data Output G7 26 FP11 Flat Panel Data Output G3 27 FP7 Flat Panel Data Output B7 28 FP10 Flat Panel Data Output G2 29 3...

Page 32: ...utput for LCD driver 44 FPVS Flat Panel VSync FLM This signal is digital monitor equivalent of VSYNC 45 DISPEN Flat Panel Enable VEE This signal is used for power sequencing 46 FPHS Flat Panel HSync LP This signal is the digital monitor equivalent of HSYNC 47 48 GND Ground 49 50 VCC_BKLT Jumper JP5 determines back light inverter voltage pins 1 2 5V or pins 2 3 12V Note The 12V voltage is supplied ...

Page 33: ...NC Not connected 9 NC Not connected 2 10 NC Not connected 11 NC Not connected 1 12 NC Not connected 13 NC Not connected 0 14 NC Not connected 15 NC Not connected 16 LCD_EN LCD Enable 17 LVDSA_Clk Data Positive Output Clk Channel 1 18 LVDSA_Clk Data Negative Output 19 LVDSA_Y3 Data Positive Output 3 20 LVDSA_Y3 Data Negative Output 21 LVDSA_Y2 Data Positive Output 2 22 LVDSA_Y2 Data Negative Output...

Page 34: ...t line with pin 3 of the Utility interface J16 User GPIO Signals The ReadyBoard 620 provides eight GPIO pins for custom use and the signals are routed to the J4 connector ADLINK has provided sample applications showing how to use the GPIO pins in the Miscellaneous Source Code Examples on the ReadyBoard 620 Support Software DVD For more information about the GPIO pin operation refer to the datashee...

Page 35: ... sent when no transmission is sent during the serial bit time Both of these methods require an understanding of the timing diagrams provided in the Super I O controller W83627HF specifications available from the manufacture s web site and referenced earlier in this manual For more information refer to the Winbond W83627HF specifications and the Infrared Data Association web site at http www irda o...

Page 36: ...al port 1 COM 1 prior to applying power to prevent the current BIOS settings from loading After booting with the Oops jumper in place remove the Oops jumper and go into BIOS Setup Utility Change the desired BIOS settings or select the default settings and save the changes before rebooting the system To convert the Serial 1 interface to an Oops jumper short together the DTR 4 and RI 9 pins on the S...

Page 37: ...lems include failure to boot properly loss of control by the application software failure of an interface device unexpected conditions on the bus or other hardware or software malfunctions The WDT watchdog timer can be used both during the boot process and during normal system operation During the boot process If the operating system fails to boot in the time interval set in the BIOS the system wi...

Page 38: ...trol If you use a non ATX power supply you will not have the soft off feature for sleep states normally provided by ATX power supplies Note The shaded areas denote power or ground The signals marked with Negative true logic CAUTION This table matches the board even though the 5V and 12V are swapped in comparison to typical AT power supply cables Table 3 15 Power In Interface Pin Signal Description...

Page 39: ...em such as Windows 2000 XP The term sleep state refers to a low latency reduced power consumption state which can be re started awakened restoring full operation to the ReadyBoard 620 If a computer is in one of the various sleep states the computer appears to be off as indicated by such things as no display on the connected monitor and no activity for the connected floppy drive CD ROM or hard driv...

Page 40: ... ReadyBoard 620 must either be powered on or in a sleep state and then the Power On switch is pressed for 4 to 6 seconds To go to a fully powered up state press the Power On switch for less than 4 seconds default and full operation is restored The OS may provide additional programming features to change the activation time for each state and to shutdown or transition the ReadyBoard 620 at certain ...

Page 41: ...s the BIOS Setup Utility in VGA mode 2 Set the BIOS feature Remote Access to Enabled under the Advanced menu 3 Accept the default options or make your own selections for the balance of the Remote Access fields and record your settings 4 Ensure you select the type of remote serial terminal you will be using and record your selection 5 Select Save Changes and Exit and then shut down the ReadyBoard 6...

Page 42: ... memory windows are available for mapping I O Port or Memory regions to ISA modules by specifying the window length and base address By default the following I O port windows are mapped to ISA modules 200 240h 240 260h 279h 300 340h 340 360h A79h By default no memory windows are mapped to ISA modules Any of the DMA channels 0 1 2 3 5 6 7 can be mapped to ISA modules by changing the default setting...

Page 43: ...n there depending on the options selected in BIOS Setup while the OS boots Logo Image Requirements The user s image may be customized with any image editing tool and the system will automatically convert the image into an acceptable format to the tools files and utilities provided by ADLINK The ReadyBoard 620 OEM Logo utility supports the following image formats Bitmap image 16 Color 640x480 pixel...

Page 44: ...Chapter 4 BIOS Setup Utility 38 Reference Manual ReadyBoard 620 ...

Page 45: ...ce You may also request personal assistance by creating an Ask an Expert account and then going to the Ask a Question feature Requests can be submitted 24 hours a day 7 days a week You will receive immediate confirmation that your request has been entered Once you have submitted your request you must log in to go to My Stuff area where you can check status update your request and access other feat...

Page 46: ...Appendix A Technical Support 40 Reference Manual ReadyBoard 620 ...

Page 47: ... L Lithium Battery Real Time Clock RTC 30 logo screen requirements 37 M major integrated circuit specifications web sites 2 P PCI specifications references 1 processor requirements heatsinks 14 R ReadyBoard 620 ACPI features 33 audio interface features 23 block diagram 7 can not see BIOS entry prompt 35 CPU features 4 current capability 12 dimensions 12 environmental requirements 14 EPIC Architect...

Page 48: ... drives 4 Infrared IrDA interface 6 29 input power 5V 32 IRQ assignments 16 jumper headers on board 11 LAN Boot PXE 6 LVDS video interface 24 memory map 17 modified serial cable 31 Oops jumper BIOS recovery 6 30 Optional PC 104 ISA bus 4 parallel port 5 18 PCI 104 4 physical dimensions 13 power requirements 12 power on switch 28 Real Time Clock RTC 6 30 remote access 6 31 required power on connect...

Page 49: ...Index ReadyBoard 620 Reference Manual 43 references 1 weight ReadyBoard 620 12 ...

Page 50: ...Index 44 Reference Manual ReadyBoard 620 ...

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