24
Operation Theory
3.2.4
Synchronous Digital Input
The PCIe-9842 has two synchronous digital input channels, SDI0
an SDI1. These two digital input lines can be sampled synchro-
nously with Timebase clock for mixed signal applications. Thus the
data transfer can up to 200 Mbit/s when using internal 200 MS/s
Timebase clock. These two digital input lines are combined with
ADC data and located in 2 LSB when SDI function is enabled.
Please refer to Figure 3-5 for more details.
Figure 3-5: Synchronous Digital Input Operations
Note
:
When, the SDI function is enabled, the remaining DIO ports
(DIO2-7) are invalid.
Amplifier
Circuitry
CLK
ADC
D Flip-Flop
Data
SDI0
Analog
Input
SDI0
SDI1
ADC Data
Bit 0
Bit 1
Bit 2
Bit 15
Timebase
SDI1
D
Q
CLK
D
Q
CLK
Summary of Contents for PCIe-9842
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Page 40: ...32 Operation Theory ...