ADLINK Technology CoreModule 920, Reference Manual

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Chapter 3 Hardware
CoreModule 920 Reference Manual 31
Note: The shaded table cells denote power or ground.
Power Interface
The CoreModule 920 requires one +5 volt DC power source and provides a shrouded 10-pin, right-angle
header with 2 rows, odd/even pin sequence (1, 2), and 0.100" (2.54mm) pitch.
The power input header (J24) supplies the following voltage and ground directly to the module:
•
4.75VDC - 5.0VDC +/- 5%
Note: The shaded table cells denote power or ground.
13 LVDSA_DAT0_P LVDS A DATA Positive Line 0
14 LVDSA_DAT0_N LVDS A DATA Negative Line 0
15 LBKLT_CTL Panel Backlight Control
16 LVDD_EN Enable Panel Power
17 LDDC_CLK Display Data Channel Clock
18 LDDC_DATA Display Data Channel Data
19 LBKLT_EN Enable Backlight Inverter
20 NC Not Connected
Table 3-12. Power Interface Pin Signals (J24)
Pin Signal Descriptions
1 GND Ground
2 +5V +5 Volts
3 GND Ground
4 +12V +12 Volts routed to PC/104, PC/104-Plus, and LVDS interfaces
5 GND Ground
6 +3.3V_PCI +3.3 Volts routed to PCI
7 GND Ground
8 +5V +5 Volts
9 GND Ground
10 +5V +5 Volts
Table 3-11. LVDS Video Interface Pin Signals (J23) (Continued)
Pin # Signal Description