Acromag IP445 Series, User Manual

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SERIES IP445 INDUSTRIAL I/O PACK 32 CHANNEL ISOLATED SSR OUTPUT MODULE
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Grounding and Noise Considerations
Output lines of the IP445 are optically isolated between the logic
and field output connections. Likewise, separate port commons
ensure port-to-port isolation. Consequently, the field I/O
connections are isolated from the carrier board and backplane, thus
minimizing the negative effects of ground bounce, impedance drops,
and switching transients. However, care should be taken in
designing installations to avoid inadvertently compromising isolation,
or creating ground loops which can cause noise pickup and reduce
overall system reliability.
IP Logic Interface Connector (P1)
P1 of the IP module provides the logic interface to the mating
connector on the carrier board. The pin assignments of P1 are
standard for all IP modules according to the Industrial I/O Pack
Specification (see Table 2.2). The IP Logic Interface connector is a
50-pin female receptacle header (AMP 173279-3 or equivalent)
which mates to the male connector of the carrier board (AMP
173280-3 or equivalent). This provides excellent connection integrity
and utilizes gold-plating in the mating area. Threaded metric M2
screws and spacers are supplied with the IP module to provide
additional stability for harsh environments (see Drawing 4501-434
for assembly details). Field and logic side connectors are keyed to
avoid incorrect assembly.
Table 2.2: Standard Logic Interface Connections (P1)
Pin Description Number Pin Description Number
GND 1 GND 26
CLK 2 +5V 27
Reset* 3 R/W* 28
D00 4 IDSEL* 29
D01 5 DMAReq0* 30
D02 6 MEMSEL* 31
D03 7
DMAReq1*
32
D04 8 IntSel* 33
D05 9 DMAck0* 34
D06 10 IOSEL* 35
D07 11 RESERVED 36
D08
12 A1 37
D09 13 DMAEnd* 38
D10 14 A2 39
D11 15 ERROR* 40
D12 16 A3 41
D13
17
INTReq0*
42
D14 18 A4 43
D15 19 INTReq1* 44
BS0* 20 A5 45
BS1* 21 STROBE* 46
-12V
22 A6 47
+12V 23 ACK* 48
+5V 24 RESERVED 49
GND 25 GND 50
An Asterisk (*) is used to indicate an active-low signal.
BOLD ITALIC
Logic Lines are NOT USED by this IP Model.
3.0 PROGRAMMING INFORMATION
IP IDENTIFICATION SPACE - (Read Only, 32 Odd-Byte
Addresses)
Each IP module contains identification (ID) information that
resides in the ID space per the IP module specification. This area of
memory contains 32 bytes of information at most. Both fixed and
variable information may be present within the ID space. Fixed
information includes the "IPAC" identifier, model number, and
manufacturer's identification codes. Variable information includes
unique information required for the module. The IP445 ID
information does not contain any variable (e.g. unique calibration)
information. ID space bytes are addressed using only the odd
addresses in a 64 byte block (on the “Big Endian” VMEbus). Even
addresses are used on the “Little Endian” PC ISA bus. The IP445
ID space contents are shown in Table 3.1. Note that the base-
address for the IP module ID space (see your carrier board
instructions) must be added to the addresses shown to properly
access the ID space. Execution of an ID space read requires 0 wait
states.
Table 3.1: IP445 ID Space Identification (ID) ROM
Hex Offset
From ID
ROM Base
Address
ASCII
Character
Equivalent
Numeric
Value
(Hex) Field Description
01 I 49 All IP's have 'IPAC'
03 P 50
05 A 41
07 C 43
09 A3 Acromag ID Code
0B 09 IP Model Code
1
0D 00 Not Used
(Revision)
0F 00 Reserved
11 00 Not Used (Driver
ID Low Byte)
13 00 Not Used (Driver
ID High Byte)
15 0C Total Number of ID
ROM Bytes
17 8C CRC
19 to 3F yy Not Used
Notes (Table 3.1):
1. The IP model number is represented by a two-digit code within
the ID space (the IP445 model is represented by 09 Hex).
2. Execution of an ID space read requires 0 wait states.
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