
20
fed to one input of the cross-coupled NAND gates. Similarly, the 4MHz signal having been inverted by
part of IC43 is coupled via a capacitor/resistor network (C41 and R94) to the other input of the cross-
coupled NAND gates. This CR network delays the reset action of the bistable thus producing a modified
4MHz waveform (see figure 3.1).
The phase-modified 4MHz waveform produced by the bistable is exclusively ORed (using part of IC38)
with the 2MHz clock to produce a 6MHz clock which is "phase-locked" to the master clock. This 6MHz
signal contains erroneous pulses which are removed by a CR network coupled to the input of an inverter
(IC37, 74LS04)
Summary of Contents for BBC A
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