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Chapter 4
81
DA
Restore CPUID value back into register. Give control to BIOS POST (ExecutePOSTKernel).
See POST Code Checkpoints section of document for more information.
DC
System is waking from ACPI S3 state.
E1-E8 EC-
EE
OEM memory detection/configuration error. This range is reserved for chipset vendors &
system manufacturers. The error associated with this value may be different from one
platform to the next.
Checkpoint
Description
Summary of Contents for Aspire M3410
Page 1: ...Acer Aspire M3410 M3410G Service Guide PRINTED IN TAIWAN ...
Page 13: ...Chapter 1 5 Block Diagram ...
Page 47: ...Chapter 3 39 4 Pull the ODD from the chassis ...
Page 65: ...Chapter 3 57 3 Install the two taches on cooler to bracket 4 Lock the CPU cooler ...
Page 72: ...64 Chapter 3 Install the I O Shielding 1 Install I O shielding into chassis ...
Page 75: ...Chapter 3 67 Install the Optica Drive 1 Install the ODD into chassis 2 Fix the four screws ...
Page 84: ...76 Chapter 3 Install the Side Panel 1 Install the side Panel then fix two Screws ...
Page 92: ...Chapter 5 84 M B Placement Jumper and Connector Information Chapter 5 ...