46
Schematic Diagram
Main Board
AVDDA
VLCD
VCPU
AVDDPLL
B3
6.MCU
onBACKLITE
ST_DET2
onPANEL_5V/3.3V
WR
INT
ALE
DDC_DAT
ST_DET1
RD
HWRESET
DDC_CLK
VCPU
RXD
TXD
AD0
AD1
AD2
AD3
AUDIO_SD
AUDIO_MU
DDC_WP
onPOWER
+2.5V_DMQ
B4
2.POWER
VLCD
AdjBACKLITE
onBACKLITE
onPanel_5V/3.3V
VCC12V_AUDIO
VCPU
+3.3DV1
+3.3DV2
AVDDPLL2
VDD_MPLL
AVDDA
AVDD_DVI
AVDD_PLL
+2.5MVDD
VDDC
+APLL
+2.5V_DMC
+2.5V_DMQ
onPOWER
+2.5MVDD
AVDD_DVI
+3.3DV1
AVDDA
+2.5V_DMC
+2.5V_DMC
+2.5MVDD
AVDD_DVI
B1
3.INPUT
RIN
GIN
BIN
VSYNC
GNDR
GNDG
GNDB
ST_DET1
HSYNC
SOG
DDC_CLK
DDC_DAT
ST_DET2
R+
R-
G-
G+
B+
B-
CLK+
CLK-
TXD
RXD
DDC_WP
VDD_MPLL
B2
4.SCALER
AVDDA
VDD_MPLL
AVDD_DVI
VDDC
AVDD_PLL
+3.3DV2
+3.3DV1
+2.5MVDD
+APLL
AVDDPLL2
SOG
GIN
GNDG
BIN
GNDB
GNDR
RIN
HSYNC
VSYNC
B+
B-
G-
G+
R-
R+
CLK+
CLK-
FSDQSU0
/FSWE
FSDQSU1
FSCLK-
FSDQM1
FSCLK+
FSDQSU2
FSBKSEL0
FSDATAU[0..31]
FSDQM0
FSCKE
/FSCAS
FSBKSEL1
FSDQSU3
/FSRAS
FSADDR[0..11]
HWRESET
WR
INT
RD
ALE
AD0
AD1
AD2
AD3
AdjBACKLITE
Volume
VLCD
B6
7.AUDIO
VOLUME
AUDIO_SD
VCC12V_AUDIO
AUDIO_MU
AVDDPLL2
+2.5V_DMQ
TOP
1
715G1765-1 for AL2051W (acer)
B
2
8
Tuesday, January 03, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
MST9251A SCHEMATIC
AVDDPLL
FSDDR[0..11]
+3.3DV2
+APLL
+APLL
VDDC
B5
5.Frame Memory
+2.5V_DMQ
+2.5V_DMC
FSADDR[0..11]
FSDQSU0
FSDQSU1
/FSWE
FSDQM0
FSDATAU[0..31]
FSBKSEL1
/FSRAS
/FSCAS
FSCKE
FSDQSU2
FSDQSU3
FSCLK-
FSDQM1
FSCLK+
FSBKSEL0
VCC12V_AUDIO
+3.3DV2
VLCD
FSDATAU[0..31]
VDDC
+3.3DV1
AVDDPLL2
VCC12V_AUDIO
VDD_MPLL
VCPU
Chapter 7
All manuals and user guides at all-guides.com
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Summary of Contents for AL2051W
Page 22: ...b The Description For Control Function All manuals and user guides at all guides com ...
Page 23: ...All manuals and user guides at all guides com ...
Page 42: ...42 Exploded Diagram Model AL2051W All manuals and user guides at all guides com ...
Page 53: ...53 Power Inverter board All manuals and user guides at all guides com ...