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Major Chips Description

2-71

Table 2-8

65555 Pin Functions

Ball

Pin Name

Type

Active

Description

Flat Panel Display Interface

W6

V7
Y6

W7

V8
Y7

W8

U9
V9
Y8

W9

Y9

V10

W10

Y10
U10
U11
Y11

W11

V11
Y12
Y13
V12
U12

W13

Y14
V13

W14

Y15
V14

W15

Y16
V15
Y17

W16

U15

P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35

Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out

High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High

Flat panel data bus of up to 36-bits

Y5

SHFCLK

Out

High

Shift Clock. Pixel clock for nat panel data

W5

FLM

Out

High

First Line Marker. Flat Panel equivalent of
VSYNC

Y4

LP
(CL1)(DE)(BLANK#)

Out

High

Latch Pulse (may also be called CL1 ). Flat
Panel equivalent of HSYNC. May also be
configured as DE (display enable) or BLANK#
output

V6

M
(DE)(BLANK#)

Out

High

M signal for panel AC drive control (may also be
called ACDCLK). May also be configured as DE
(display enable) or BLANK# output

V5

W4

U6

ENAVDD

ENAVEE(ENABKL)

ENABKL

I/O

I/O

I/O

high

High

High

Power sequencing control for panel driver
electronics voltage VDD
Power sequencing control for panel bias voltage
VEE. May also be configured as ENABKL
Power sequencing control for enabling the
backlight

.

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Summary of Contents for 390 Series

Page 1: ...390 Series 390 Series Notebook Computer Notebook Computer Service Guide PART NO 49 43A02 001 DOC NO SG234 9710A PRINTED IN TAIWAN ...

Page 2: ... fitness for any particular purpose Any Acer Incorporated software described in this manual is sold or licensed as is Should the programs prove defective following their purchase the buyer and not Acer Incorporated its distributor or its dealer assumes the entire cost of all necessary servicing repair and any incidental or consequential damages resulting from any defect in the software Further Ace...

Page 3: ...s Chapter 2 Major Chips Description This chapter describes the features and functions of the major chipsets used in the system board It also includes chipset block diagrams pin diagrams and pin descriptions Chapter 3 BIOS Setup Utility This chapter describes the parameters in the BIOS Utility screens Chapter 4 Disassembly and Unit Replacement This chapter describes how to disassemble the 390 serie...

Page 4: ...ual messages that appear onscreen etc Represent the actual keys that you have to press on the keyboard NOTE Gives bits and pieces of additional information related to the current topic WARNING Alerts you to any damage that might result from doing or not doing specific actions CAUTION Gives precautionary measures to avoid possible hardware or software problems IMPORTANT Reminds you to do specific a...

Page 5: ...1 Memory Address Map 1 9 1 4 2 Interrupt Channel Map 1 9 1 4 3 DMA Channel Map 1 10 1 4 4 I O Address Map 1 10 1 4 5 Processor 1 11 1 4 6 BIOS 1 11 1 4 7 System Memory 1 11 1 4 8 Second Level Cache 1 12 1 4 9 Video Memory 1 13 1 4 10 Video 1 13 1 4 11 Parallel Port 1 14 1 4 12 Serial Port 1 15 1 4 13 Audio 1 15 1 4 14 PCMCIA 1 15 1 4 15 Touchpad 1 16 1 4 16 Keyboard 1 16 1 4 17 FDD 1 17 1 4 18 HDD...

Page 6: ...A 2 2 2 1 1 Features 2 2 2 1 2 Block Diagram 2 4 2 1 3 Terminal Functions 2 5 2 2 Aladdin IV M1531 M1533 2 20 2 2 1 M1531 2 20 2 2 2 M1533 2 34 2 3 FDC37C672 2 47 2 3 1 Features 2 47 2 3 2 General Description 2 49 2 3 3 Pin Configuration 2 50 2 3 4 Pin Descriptions 2 52 2 3 5 Description of Multifunction Pins 2 55 2 3 6 Block Diagram 2 56 2 4 65555 2 57 2 4 1 Features 2 57 2 4 2 Software Support F...

Page 7: ...4 1 General Information 4 1 4 1 1 Before You Begin 4 1 4 1 2 Connector Types 4 3 4 1 3 Disassembly Sequence 4 4 4 2 Installing Memory 4 6 4 3 Removing the Modem Board 4 8 4 4 Removing the Hard Disk Drive 4 9 4 5 Removing the Keyboard 4 10 4 6 Disassembling the Inside Frame Assembly 4 12 4 6 1 Removing the Heat Sink Assembly 4 12 4 6 2 Removing the Display 4 13 4 6 3 Removing the Internal Drive 4 1...

Page 8: ...viii Appendices Appendix A Model Number Definition Appendix B Exploded View Diagram Appendix C Spare Parts List Appendix D Schematics Appendix E BIOS POST Checkpoints ...

Page 9: ...iagram 1 32 2 1 PCI1250 Block Diagram 2 4 2 2 M1531 Pin Diagram Top View 2 23 2 3 M1533 Pin Diagram Top View 2 39 2 4 FDC37C67 TQFP Pin Diagram 2 50 2 5 FDC37C67 QFP Pin Diagram 2 51 2 6 FDC37C67 Block Diagram 2 56 2 7 65555 BGA Ball Assignments Top View 2 64 2 8 65555 BGA Ball Assignments Bottom View 2 65 2 9 M38813 Pin Diagram 2 78 2 10 M38813 Block Diagram 2 80 2 11 YMF715 Block Diagram 2 82 4 ...

Page 10: ...crews 4 17 4 21 Removing the Keyboard Touchpad Board and DC DC Converter Board Cover 4 17 4 22 Removing the DC DC Converter Board 4 18 4 23 Removing the Mainboard 4 18 4 24 Removing the Charger Board 4 19 4 25 Removing the PCMCIA Sockets 4 19 4 26 Removing the Hard Disk Drive Heat Sink 4 20 4 27 Removing the Audio Board 4 20 4 28 Removing the Touchpad and Speakers 4 21 4 29 Removing the LCD Bumper...

Page 11: ...16 Audio Specifications 1 15 1 17 PCMCIA Specifications 1 16 1 18 Touchpad Specifications 1 16 1 19 Keyboard Specifications 1 16 1 20 Windows 95 Key Descriptions 1 17 1 21 FDD Specifications 1 17 1 22 HDD Specifications 1 18 1 23 CD ROM Specifications 1 18 1 24 Battery Specifications 1 19 1 25 Charger Specifications 1 20 1 26 DC DC Converter Specifications 1 20 1 27 DC AC Inverter Specifications 1...

Page 12: ...ical Pin List 2 40 2 6 FDC37C67 Pin Descriptions 2 52 2 7 FDC37C67 Multifunction Pin Descriptions 2 55 2 8 65555 Pin Functions 2 66 2 9 M38813M4 XXXHP Functions 2 77 2 10 M38813M4 XXXHP Pin Description 2 79 2 11 YMF715 Descriptions 2 83 3 1 Basic System Settings Parameters 3 3 3 2 Startup Configuration Parameters 3 4 3 3 Onboard Devices Configuration Parameters 3 6 3 4 System Security Parameters 3...

Page 13: ...h capacity Enhanced IDE hard disk Lithium Ion or Nickel Metal Hydride battery pack Power management system with light green standby and hibernation power saving modes Multimedia 16 bit high fidelity stereo audio with 3 D sound Built in dual speakers Ultra slim high speed CD ROM drive Connectivity High speed fax data modem port Fast infrared wireless communication USB Universal Serial Bus port Huma...

Page 14: ...1 2 Service Guide 1 2 System Board Layout 1 2 1 Mainboard Figure 1 1 PCB No 96183 1A Mainboard Layout Top ...

Page 15: ...System Introduction 1 3 Figure 1 2 PCB No 96183 1A Mainboard Layout Bottom ...

Page 16: ...1 4 Service Guide 1 2 2 CPU Board Figure 1 3 PCB No 96534 SE CPU Board Layout Top Figure 1 4 PCB No 96534 SE CPU Board Layout Bottom ...

Page 17: ...X V V X V X X X X X P55C 150MHz 2 5V 150 60x2 5 V X V V X X V V V X V X X X X X P55C 166MHz 2 5V 166 66x2 5 V X V X X X V V V X V X X X X X TLMK 200MHz 1 8V 200 66x3 X X V X X V V X V X X V V V V V TLMK 233MHz 1 8V 233 66x3 5 X X V X V V X X V X X V V V V V TLMK 266MHz 2 0V 266 66x4 X V V X X X V V X V X V V V V V 1 2 3 Audio Board Figure 1 5 PCB No 97355 1 Audio Board 1 2 4 Battery Board Figure 1...

Page 18: ...1 6 Service Guide 1 2 5 Keyboard Touchpad Board Figure 1 7 PCB No 97349 1 Keyboard Touchpad Board Top View Figure 1 8 PCB No 97349 1 Keyboard Touchpad Board Bottom View ...

Page 19: ...or CN6 RJ 11 phone jack CN19 HDD connector CN7 DC DC connector CN20 CD ROM connector CN8 Inverter connector CN21 CPU board connector CN9 LCD connector CN22 Battery connector CN10 Charger connector GF1 Golden finger for debug card CN11 Charger connector SW1 KB password logo setting switch CN12 Fan connector U1 FIR port CN13 Internal speaker connector left Figure 1 9 Jumpers and Connectors Top View ...

Page 20: ...ure 1 10 Jumpers and Connectors Bottom View The following tables list the switch settings for SW1 Table 1 2 SW1 Switch Settings ON OFF Switch 1 Logo Screen OEM Acer Switch 2 Password Bypass Check Germany U S Japanese Switch 3 KB Language On Off Off Switch 4 KB Language Off Off On CN24 CN23 DIMM ...

Page 21: ...10 11 12 13 14 15 16 17 18 19 SMI NMI IRQ 0 IRQ 1 IRQ 2 IRQ 8 IRQ 9 IRQ 10 IRQ 11 IRQ 12 IRQ 13 IRQ 14 IRQ 15 IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 Power management unit Parity error detected I O channel error Interval timer counter 0 output Keyboard Interrupt from controller 2 cascade Real time clock Cascaded to INT 0AH IRQ 2 Audio PCMCIA Audio option PCMCIA Internal modem Serial communication port 2 PCM...

Page 22: ...0 1F7 220 22F 230 23F 240 24F 250 25F 278 27F 2E8 2EF 2F8 2FF 378 37A 3BC 3BE 3B4 3B5 3BA 3C0 3C5 3C6 3C9 3C0 3CF 3D0 3DF 3E0 3E1 3E8 3EF 3F0 3F7 3F8 3FF CF8 CFF DMA controller 1 Interrupt controller 1 Timer 1 Timer 2 Keyboard controller 8742 chip select Real time clock and NMI mask DMA page register Interrupt controller 2 DMA controller 2 Hard disk select Audio option default Audio option Audio o...

Page 23: ...erwritten upgradeable using the AFLASH utility AFLASH EXE Please refer to software specification section for details 1 4 7 System Memory Memory is upgradeable from 8 to 64 MB employing 8 16 32 64 MB2 64 bit soDIMMs Small Outline Dual Inline Memory Modules After installing the memory modules the system automatically detects and reconfigures the total memory size during the POST routines The followi...

Page 24: ...lot 1 Slot 2 Total Memory 8 MB 0 MB 8 MB 0 MB 8 MB 8 MB 8 MB 8 MB 16 MB 16 MB 0 MB 16 MB 0 MB 16 MB 16 MB 16 MB 8 MB 24 MB 8 MB 16 MB 24 MB 16 MB 16 MB 32 MB 32 MB 0 MB 32 MB 0 MB 32 MB 32 MB 32 MB 8 MB 40 MB 8 MB 32 MB 40 MB 32 MB 16 MB 48 MB 16 MB 32 MB 48 MB 32 MB 32 MB 64 MB 64MB 0MB 64MB 0MB 64MB 64MB 64MB 8MB 72MB 8MB 64MB 72MB 64MB 16MB 80MB 16MB 64MB 80MB 64MB 32MB 96MB 32MB 64MB 96MB 64MB...

Page 25: ...n Support Table 1 12 Supported External CRT Resolutions Resolution x Color on External CRT CRT Refresh Rate Simultaneous on TFT LCD Simultaneous on STN LCD CRT only Simultaneous SVGA SVGA 640x480x16 60 75 85 60 Y Y 640x480x256 60 75 85 60 Y Y 640x480x65 536 60 75 85 60 Y Y 640x480x16 777 216 60 75 85 60 Y Y 800x600x16 56 60 75 85 60 Y Y 800x600x256 56 60 75 85 60 Y Y 800x600x65 536 56 60 75 85 60 ...

Page 26: ...Y 1024x768x65536 Y Y 1280x1024x16 Y Y 1280x1024x256 Y Y Maximum resolution External CRT 1280x1024 Using software you can set the LCD to a higher resolution than its physical resolution but the image shown on the LCD will pan 1 4 11 Parallel Port Table 1 14 Parallel Port Configurations Item Specification Number of parallel ports 1 ECP support Yes set by BIOS setup Connector type 25 pin D type Locat...

Page 27: ...ophone CD Voice channel 8 16 bit mono stereo Sampling rate 44 1 kHz Internal microphone No Internal speaker quantity Yes 2 pcs Microphone jack Yes Headphone jack Yes 1 4 14 PCMCIA PCMCIA is an acronym for Personal Computer Memory Card International Association The PCMCIA committee set out to standardize a way to add credit card size peripheral devices to a wide range of personal computers with as ...

Page 28: ...Synaptics TM3202TPD 226 Power supply voltage V 5 10 Location Palm rest center Internal external pointing device work simultaneously Yes Support external pointing device hot plug Yes X Y position resolution points mm 20 Interface PS 2 compatible with Microsoft mouse driver 1 4 16 Keyboard Table 1 19 Keyboard Specifications Item Specification Vendor model name SMK KAS1901 0161R English Total number ...

Page 29: ...dows F Find Document Windows M Minimize All Shift Windows M Undo Minimize All Windows R Display Run dialog box Application key Opens the application s context menu same as right click 1 4 17 FDD Table 1 21 FDD Specifications Item Specification Vendor model name Mitsumi D353F2 Floppy Disk Specifications Media recognition 2DD 720K 2HD 1 2M 3 mode 2HD 1 44M Sectors track 9 15 18 Tracks 80 80 80 Data ...

Page 30: ... Data transfer rate disk buffer Mbytes s 5 7 9 0 5 7 7 5 8 3 Data transfer rate host buffer Mbytes s 16 6 33 3 max PIO mode 4 16 6 max PIO mode 4 16 6 max PIO mode 4 DC Power Requirements Voltage tolerance V 5 5 5 5 5 5 1 4 19 CD ROM Table 1 23 CD ROM Specifications Item Specification Vendor Model Name Panasonic KMEUJDA110 Performance Specification Speed KB sec 2100 14X ave speed Access time ms 15...

Page 31: ...to the notebook and an electrical outlet The adapter has three charging modes Rapid mode The notebook uses rapid charging when power is turned off and a powered AC adapter is connected to it In rapid mode a fully depleted battery gets fully charged in approximately two hours Charge in use mode When the notebook is in use with the AC adapter plugged in the notebook also charges the battery pack if ...

Page 32: ...yp Normal charge charge while system is not operative A 2 0 typ Charging Protection Maximum temperature protection ºC 60 Maximum voltage protection V 16 7V 0 2V Over voltage protection 13V 0 15 1 4 22 DC DC Converter DC DC converter generates multiple DC voltage level for whole system unit use Table 1 26 DC DC Converter Specifications Item Specification Vendor model name Ambit T62 041 C 00 Input v...

Page 33: ... 1 5 6 1 typ 2 0 6 7 max 1 4 24 LCD Table 1 28 LCD Specifications Item Specification Vendor model name HITACHI LMG9980ZWCC 01 TORiSAN LM JK53 22NFR A HITACHI TX31D21VC Mechanical Specifications LCD display area diagonal inch 12 1 12 1 12 1 Display technology STN STN TFT Resolution SVGA 800x600 VGA 800x600 SVGA 800x600 Supported colors 262 144 colors Optical Specification Contrast ratio 35 typ 40 t...

Page 34: ...ode DC output voltage V 19 0V 20 5V Noise Ripple mV 300mvp pmax 20Mhz bandwidth Load A 0 min 2 4 max Output Ratings CC mode DC output voltage V 12 19 Constant output A 2 75 0 2 Dynamic Output Characteristics Turn on delay time s 115Vac 2 Hold up time ms 115 Vac input full load 5 min Over Voltage Protection OVP V 26 Short circuit protection Output can be shorted without damage Electrostatic dischar...

Page 35: ...e and decrease the brightness or contrast level Notebooks with TFT displays do not show the brightness control icon Fn F3 Display Toggle Switches display from LCD to CRT to both LCD and CRT Fn F4 Battery Gauge Displays the battery gauge Fn F5 Volume Control Press the scale hotkeys Fn and Fn to increase and decrease the output level Fn F6 Setup Gains access to BIOS Setup s Advanced System Configura...

Page 36: ...ers are timer based You set inactivity time out values for the display hard disk and other devices The computer then sleeps when these time outs elapse The problem with this is that no two users are alike Each of us has his or her own habits when using the computer which makes timer based power management ineffective With HPM your computer manages its power according to the way you use your comput...

Page 37: ...puter also enters standby mode if the hibernation file Sleep Manager is invalid or not present Hard Disk Drive is Disabled in System Security of BIOS SETUP Hard Disk 0 is None in Basic System Configuration of BIOS SETUP Note If the computer detects a PC I O card installed in the PC card slots the computer sleeps light green mode to maintain your communications connection It will not enter standby ...

Page 38: ...KB or External KB Modem ring HIBERNATION MODE In hibernation mode all power shuts off the computer does not consume any power The computer saves all system information onto the hard disk before it enters hibernation mode Once you turn on the power the computer restores this information and resumes where you left off upon leaving hibernation mode If the computer beeps but does not enter hibernation...

Page 39: ... condition of Hibernation Mode Except the RTC KB controller and power switch all the system components are off The condition back to On Mode Pressing the power switch Resume Timer matched DISPLAY STANDBY MODE Screen activity is determined by the keyboard the built in touchpad and an external PS 2 pointing device If these devices are idle for the period determined by the computer s HPM unit the dis...

Page 40: ... will enter Standby 0 Volt Hibernation Mode The battery low warning will stop as soon as the AC adapter is plugged into the system THE AUTODIM PROCESS OF THE LCD BRIGHTNESS The notebook has a unique automatic dim power saving feature When the notebook is using AC power and you disconnect the AC adapter from the notebook the system decides whether or not to automatically dim the LCD backlight to sa...

Page 41: ...htness parameter under AC power 5 If the previous brightness parameter does not exist the brightness will not be changed in process 4 1 5 2 Drivers Applications and Utilities The notebook comes preloaded with the following software Windows 95 3 System utilities and application software 4 Sleep Manager utility Display drivers Audio drivers PC Card slot drivers and applications Other third party app...

Page 42: ...applications and their locations Table 1 37 Location of Applications in the System Utility CD Name Function Location Sleep Manager 0V Suspend utility ENGLISH WIN95 SLEEPMGR Y Station Audio application ENGLISH WIN95 Ystation SafeOFF Protect if user accidentally press the power switch ENGLISH WIN95 SAFEOFF Drivers for Windows 3 x and Windows NT are also found in the System Utility CD if you should n...

Page 43: ...A Bus CPU Bus CPU Bus Tag Ram Cache DIMM2 Socket ALI M1531 VGA C T 65555 ALI M1533 CD ROM HDDD Conn AUD BD Conn USB Conn Super I O SMC FDC 37C672 Battery Conn Charger Conn BIOS ROM PCMCIA TI PCI1250A AUDIO YMF715 DIMM1 Socket KBC M38813 SMB Bus FIR control Internal FDD Conn AMP LM4836 Figure 1 12 System Block Diagram ...

Page 44: ...1 6 2 Clock CLK GEN CY2272 SMB BUS M1533 DIMM1 DIMM2 CPU CLK M1531 CACHE CPU SGRAM CLK DIMM1 DIMM2 PCI CLK 14 318M 48MHZ 1531 1533 65555 PCI1250 USB 1533 65555 YMF715 37C672 MODEM 38813 72 Figure 1 13 Clock Block Diagram ...

Page 45: ... Non operating 5 27 1Hz 0 6G 27 1 50Hz 0 41mm 50 500Hz 2G Sweep rate 0 5 octave minute Number of text cycles 4 axis X Y Z Non operating Vibration packed Non operating 5 62 6Hz 0 51mm 62 6 500Hz 4G Sweep rate 0 5 octave minute Number of text cycles 4 axis X Y Z Shock Operating 5G peak 11 1ms half sine Non operating unpacked 40G peak 11 1ms half sine Non operating packed 50G peak 11 1ms half sine Al...

Page 46: ...pecifications Table 1 39 Mechanical Specifications Item Specification Weight FDD model CD ROM model includes battery 2 77 kg 6 11 lb 2 8 kg 6 2 lb Dimensions main footprint W x D x H 311 5mm x 236 246mm x 46 5mm 12 26 x 9 29 9 69 x 1 83 ...

Page 47: ...major chips used in the notebook Table 2 1 Major Chips List Component Vendor Description PCI 1250A TI PC Card controller chip Aladdin IV M1531 M1533 ALi System Architecture chipset FDC37C672 SMC Super I O controller chip 65555 C T Video controller chip M38813 Keyboard controller chip YMF715B S Yamaha Audio chip ...

Page 48: ...ring and a pipeline architecture provide an unsurpassed performance level with sustained bursting The PCI 1250A can also be programmed to accept fast posted writes to improve system bus utilization The PCl1250A provides an internally buffered zoom video path This reduces the design effort of PC board manufacturers to add a ZV compatible solution and guarantees compliance with the CardBus loading s...

Page 49: ...Video with Internal Buffering Programmable Output Select for CLKRUN Four General Purpose I O s Multi function PCI Device with Separate Configuration Space for each Socket Five PCI Memory Windows and Two l O Windows Available to each PC Card16 Socket Two I O Windows and Two Memory Windows Available to each CardBus Socket ExCA Compatible Registers are Mapped in Memory and I O Space Supports Distribu...

Page 50: ...terrupt interface includes terminals for parallel PCI parallel ISA and serialized PCI ISA signaling The ring indicate terminal is included in the interrupt interface since it s function is to perform system wake up on incoming PC Card modem rings Miscellaneous system interface terminals include GPIO signals PC PCI DMA support signals and socket activity LED signals Figure 2 1 PCI1250 Block Diagram...

Page 51: ...es signaling level of the following inputs and shared outputs IRQSER PCGNT PCREQ SUSPENCX SPKROUT GPI01 0 IRQMUX7 0 INTA INTB CLOCK DATA LATCH and RI_OUT VCCP K20 P18 V15 W20 I Rail power input for PCI signaling VCCZ A04 D01 I Rail power input for the Zoom Video Interface PCI System Terminals PCLK J17 I PCI bus clock Provides timing fot all transactions on the PCI bus All PCI signals are sampled a...

Page 52: ...M17 T20 W19 Y17 I O PCI bus commands and byte enables These signals are multiplexed on the same PCI terminals During address phase of a primary bus PCI cycle C BE3 0 define the bus command During the data phase this four bit bus is used as byte enables The byte enables determine which byte paths of the full 32 bit data bus carry meaningful data C BE0 applies to byte 0 AD7 0 C BE1 applies to byte 1...

Page 53: ...ionality is not typically used a general purpose I O may be accessed through this terminal This terminal defaults to a general purpose input and maybe configured through the GPIO2 Control Register IDSEL N20 I Initalization device select IDSEL selects the PCI1250A during configuration space accesses IDSEL can be connected to one of the upper 24 PCI address lines on the PCI bus IRDY T18 I O PCI init...

Page 54: ... IRDY and TRDY are asserted Until both IRDY and TRDY are asserted wait states are inserted PC Card 16 Address And Data Terminals Slot A And Slot B Slot A 1 Slot B 2 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 T04 U02 U01 P04 R02 R01 P01 N02 M04 T01 T02 P02 N03 T03 M01 L01 M03 N01 V01 V02 V03 W02 W03 W04 V04 U05 C14 B15 C15 C16 A18 C17 B18 A20 C18 A...

Page 55: ... are kept high when the battery is good When BVD2 is low and BVD1 is high the battery is weak and needs to be replaced When BVD1 is low the battery is no longer serviceable and the data in the memory PC Card is lost See the Card Status Change interrupt Configuration register for enable bits See the Card Status Change register and the Interface Status register for the status bits for this signal St...

Page 56: ...ard that supports DMA The PC Card asserts this signal to indicate a request for a DMA operation CD1 CD2 G03 W06 H20 C09 I PC Card Detect 1 and Card Detect 2 CD1 and CD2 are connected to ground internally on the PC Card When a PC Card is inserted into a socket these signals are pulled low The signal status is available by reading the interface status register CE1 CE2 K01 L02 D20 D19 O Card Enable 1...

Page 57: ...usy processing a previous write command READY is driven high when the 16 bit Memory PC Card is ready to accept a new data transfer command Interrupt Request IREQ is asserted by a 16 bit l O PC Card to indicate to the host that a device on the 16 bit l O PC Card requires service by the host software IREQ is high deasserted when no interrupt is requested REG Y02 B12 O Attribute memory select REG rem...

Page 58: ...s capable of 16 bit accesses DMA request This pin can be used as the DMA request signal during DMA operations to a 16 bit PC Card which supports DMA If used the PC Card asserts this signal to indicate a request for a DMA operation VS1 VS2 Y03 U03 A11 B14 I O Voltage Sense 1 and Voltage Sense 2 VS1 and VS2 when used in conjunction with each other determine the operating voltage of the 16 bit PC Car...

Page 59: ...CCLK frequency will be decreased CardBus PC Card Address and Data Terminals Slot A and Slot B CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 C AD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10 CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0 W08 Y07 W07 V07 Y06 U05 V04 W04 W03 W02 V03 V02 T04 V01 U02 M04 M02 M03 L04 M01 L03 L02 L01 K03 J01 J04 J03 H02 H01 G01 H03...

Page 60: ...dio This signal is a digital input signal from a PC Card to the system speaker The PCI1250A supports the binary audio mode and outputs a binary signal from the card to the SPKROUT signal CBLOCK P01 B18 I O CardBus Lock This signal is used to gain exclusive access to a target CCD1 CCD2 G03 W06 H20 C09 I CardBus Detect 1 and CardBus Detect 2 These signals are used in conjunction with voltage sense s...

Page 61: ...nd other system errors which could lead to catastrophic results CSERR is driven by the card synchronous to CCLK but ceasserted by a weak pull up and may take a few CCLK periods The PCI1250A can report CSERR to the system by assertion of SERR on the PCI interface CSTOP R01 C17 I O CardBus Stop Signal This signal is driven by a CardBus target to request the initiator to stop the current CardBus tran...

Page 62: ...ese terminals is to provide the ISA type IRQ signaling supported by the PCl1250A These Interrupt mux outputs can be mapped to any of 15 IRQs The Device Control register must be programmed for the ISA IRQ interrupt mode and the IRQMUX Routing Register must have the IRQ routing programmed before these terminals are enabled All of these terminals have secondary functions such as PC PCI DMA request gr...

Page 63: ... the power switch Zoomed Video Terminals I O and Memory Interface Signal ZV_HREF A06 A10 O Horizontal Sync to the zoom video port ZV_VSYNC C07 A11 O Vertical sync to the zoom video port ZV_Y7 ZV_Y6 ZV_Y5 ZV_Y4 ZV_Y3 ZV_Y2 ZV_Y1 ZV_Y0 A03 B04 C05 B05 C06 D07 A05 B06 A20 A14 A19 A13 A18 A8 A17 A9 O Video data to the zoom video port in YV 4 2 2 format D02 C03 B01 B02 A02 C04 B03 D05 D02 C03 B01 B02 A...

Page 64: ...n is also used for the serial EEPROM interface Miscellaneous Terminals GPIO0 LEDA1 V11 I O GPIO0 Socket Activity LED Indicator 1 When this signal is configured as LEDA1 it provides an output indicating PC Card socket O activity Otherwise this signal can be configured as a general purpose input and output GPIO0 The zoom video enable signal ZVSTAT can also be routed to this signal through the GPIO0 ...

Page 65: ...ame No I O Type Function SPKROUT Y10 O Speaker Output This signal is the output to the host system that can carry the SPKR or CAUDIO signal through the PCI1250A from the PC Card interface This signal is driven as the exclusive OR combination of card SPKR CAUDIO inputs ...

Page 66: ...ory bus interface for the best DRAM upgrade ability and ECC parity design to enhance the system reliability With the concurrent bus design PCI to PCI access can run concurrently with CPU to L2 and CPU to DRAM access while PCI to DRAM access can run concurrently with CPU to L2 access The M1531 also supports the snoop ahead feature to achieve the PCI master full bandwidth access 133 MB and provides ...

Page 67: ...2 allocation Supports FPM EDO SDRAM DRAMs 8 RAS lines up to 1 GB support 64 bit data path to memory Symmetrical Asymmetrical DRAMs 3 3V or 5V DRAMs Duplicated MA 1 0 driving pins for burst access No buffer needed for RASJ and CASJ and MA 1 0 CBR and RAS only refresh for FPM CBR and RAS only refresh and Extended refresh and self refresh for EDO CBR and Self refresh for SDRAM 16 Qword deep merging b...

Page 68: ... PCI burst cycle 38 22 Dwords for PCI to DRAM Write posted Read prefetching buffers PCI to DRAM up to 133 MB sec bandwidth even when L1 L2 write back L1 L2 pipelined snoop ahead for PCI to DRAM cycle Supports PCI mechanism 1 only Complies with PCI spec 2 1 N 32 16 8 8 rule passive release fair arbitration Enhanced performance for Memory Read Line Memory Read Multiple and Memory write Invalidate PC...

Page 69: ...MD14 MD47 J HD55 HD56 HD57 HD58 HD59 GND GND GND GND GND GND MD10 MD43 MD11 MD44 MD12 K HD51 HD52 HD53 HD54 HCLKIN GND GND GND GND GND GND MD40 MD8 MD41 MD9 MD42 L HD46 HD47 HD48 HD49 HD50 GND GND GND GND GND GND MD5 MD38 MD6 MD39 MD7 M HD41 HD42 HD43 HD44 HD45 GND GND GND GND GND GND MD35 MD3 MD36 MD4 MD37 N HD36 HD37 HD38 HD39 HD40 GND GND GND GND GND GND VDD5S REQJ4 GNTJ4 MD1 MD34 MD2 P HD31 HD...

Page 70: ...t Output It connects to the input of CPU s AHOLD pin and is actively driven for inquiry cycles EADSJ O Group A External Address Strobe This signal is connected to the CPU EADSJ pin During PCI cycles the M1531 asserts this signal to proceed snooping BOFFJ O Group A CPU Back Off If BOFFJ is sampled active CPU will float all its buses in the next clock M1531 asserts this signal to request CPU floatin...

Page 71: ...are used to drive the corresponding RASJs of FPM EDO DRAMs In SDRAM they are used to drive the corresponding SDRAM CSJs CASJ 7 0 DQM 7 0 O Group C Column Address Strobes or Synchronous DRAM Input Output Data Mask These CAS signals should be connected to the corresponding CASJs of each bank of DRAM The value of CASJs equals that of HBEJs for write cycles During DRAM read cycles all of CASJs will be...

Page 72: ...ster Index 41h bit 6 bit3 and bit0 description TIO 9 SRASJ 1 I O Group C SRAM Tag 9 or Synchronous DRAM SDRAM RAS copy 1 This pin is used for multifunction It can be SRAM tag address bit 9 or another copy of SRASJ connected to SDRAM Refer to Register Index 41h bit3 and bit0 description TIO 8 SCASJ 1 I O Group C SRAM Tag 8 or Synchronous DRAM SDRAM CAS copy 1 This pin is used for multifunction It c...

Page 73: ...Hold Acknowledge This active low signal grants PCI bus to M1533 M1543 PAR I O Group B Parity bit of PCI bus It is the even parity bit across PAD 31 0 and CBEJ 3 0 SERRJ CLKRUNJ I O Group B System Error or PCI Clock RUN If the M1531 detects parity errors in DRAMs it will assert SERRJ to notify the system As CLKRUNJ this signal will connect to M1533 CLKRUNJ to start or maintain the PCI CLOCK It is a...

Page 74: ...ircuit and the core power for the internal circuit except the suspend circuit VDD_5S P Vcc 5 0V Power for Group C This pin supplies the 5V input tolerance circuit and the core power for the internal suspend circuit Vss or Gnd P Ground 2 2 1 4 Numerical Pin List Table 2 4 M1531 Numerical Pin List No Name Type No Name Type No Name Type A1 C11 CBEJ3 I O F1 BRDYJ O A2 PHLDAJ O C12 AD28 I O F2 BOFFJ O ...

Page 75: ...CIMRQJ O H13 GND P B17 MD63 I O E7 AD13 I O H16 MD45 I O B18 MD27 I O E8 SERRJ I O H17 MD13 I O B19 MD60 I O E9 IRDYJ I O H18 MD46 I O B20 MD28 I O E10 AD18 I O H19 MD14 I O C1 BEJ3 I E11 PCLKIN I H20 MD47 I O C2 BEJ2 I E12 AD26 I O J1 HD55 I O C3 BEJ1 I E13 AD31 I O J2 HD56 I O C4 AD4 I O E14 MPD6 I O J3 HD57 I O C5 CBEJ0 I O E15 MD31 I O J4 HD58 I O C6 AD10 I O E16 MD20 I O J5 HD59 I O C7 AD15 I...

Page 76: ... I O P3 HD33 I O U7 A13 I O L3 HD48 I O P4 HD34 I O U8 A8 I O L4 HD49 I O P5 HD35 I O U9 CCSJ O L5 HD50 I O P6 VCC_A P U10 BWEJ O L8 GND P P15 VCC_C P U11 CADSJ O L9 GND P P16 32K I U12 TIO0 I O L10 GND P P17 SUSPENDJ I U13 TIO1 I O L11 GND P P18 MD32 I O U14 MAB0 O L12 GND P P19 MD0 I O U15 MAB1 O L13 GND P P20 MD33 I O U16 MA5 O L16 MD5 I O R1 HD26 I O U17 MWEJ I O L17 MD38 I O R2 HD27 I O U18 R...

Page 77: ...DSJ I W6 A18 I O W7 A15 I O G3 AHOLD O W7 A15 I O Y7 A16 I O B1 BEJ0 I W8 A11 I O V6 A17 I O C3 BEJ1 I W9 A7 I O W6 A18 I O C2 BEJ2 I W10 A30 I O Y6 A19 I O C1 BEJ3 I W11 A31 I O Y5 A20 I O D3 BEJ4 I W12 A22 I O W13 A21 I O D2 BEJ5 I W13 A21 I O W12 A22 I O D1 BEJ6 I W14 TIO4 I O V137 A23 I O E4 BEJ7 I W15 TIO6 I O V12 A24 I O F2 BOFFJ O W16 MA3 O V11 A25 I O F1 BRDYJ O W17 MA7 O Y12 A26 I O U10 B...

Page 78: ... I O J10 GND P V3 HD13 I O G1 HD63 I O J11 GND P V2 HD14 I O E2 HITMJ I J12 GND P V1 HD15 I O F4 HLOCKJ I J13 GND P U1 HD16 I O E9 IRDYJ I O J8 GND P U2 HD17 I O G4 KENJ O J9 GND P U3 HD18 I O D8 LOCKJ I O K10 GND P U4 HD19 I O V15 MA2 O K11 GND P U5 HD20 I O W16 MA3 O K12 GND P T1 HD21 I O V16 MA4 O K13 GND P T2 HD22 I O U16 MA5 O K8 GND P T3 HD23 I O Y17 MA6 O K9 GND P T4 HD24 I O W17 MA7 O L10 ...

Page 79: ... MD19 I O V5 HD3 I O K3 HD53 I O E16 MD20 I O Y4 HD4 I O K4 HD54 I O E18 MD21 I O W4 HD5 I O J1 HD55 I O E20 MD22 I O V4 HD6 I O J2 HD56 I O D17 MD23 I O Y3 HD7 I O J3 HD57 I O D19 MD24 I O Y2 HD8 I O J4 HD58 I O C17 MD25 I O Y1 HD9 I O J5 HD59 I O C19 MD26 I O W3 HD10 I O H1 HD60 I O B18 MD27 I O B20 MD28 I O B16 MPD1 I O W15 TIO6 I O A19 MD29 I O A16 MPD2 I O Y16 TIO7 I O C16 MD30 I O D15 MPD3 I...

Page 80: ...stem Peripherals ISP 2 x 82C59 and serial interrupt 1 x 82C54 advanced features Type F and Distributed DMA in the DMA controller 2 x 82C54 PS 2 keyboard mouse controller two channel dedicated IDE master controller with Ultra 33 specification System Management Bus SMB and two OpenHCI 1 0a USB ports The ACPI Advanced Configuration and Power Interface and PCI 2 1 Delayed Transaction Passive Release s...

Page 81: ... by throttling control In addition the M1533 offers the most flexible system clock design It can be programmed to stop the CPU Clock PCI Clock the Clock cell or to reduce the Clock frequency The PBSRAM Pipelined burst SRAM doze mode is also supported The M1533 is includes a PS 2 keyboard mouse controller SMBus two OpenHCI 1 0a USB ports and the dedicated GPIO General Purpose Input Output pins Thes...

Page 82: ...mouse controller Supports up to 256 KB ROM size decoding Supports positive subtractive decode for ISA device PMU features Full support for ACPI and OS directed power management CPU SMM Legacy mode and SMI feature supported Supports programmable STPCLKJ throttle CKONSTP CKOFFSTP control Supports I O trap for I O restart feature PMU operation states On Standby Sleeping Power On Suspend Suspend Suspe...

Page 83: ...tton Hot key press Multiple external wakeup events of Standby mode Power button Cover open Modem ring RTC alarm EXTSW DRQ2 Suspend wakeup detected Hot key Modem ring RTC alarm Cover open Docking insert Power button USB events IRQ EJECT ACPWR GPIO 19 16 event Two level battery warning monitor Thermal alarm supported Clock generator control logic supported CPUCLK stop control PCICLK stop control PLL...

Page 84: ... sec Supports PIO Modes up to Mode 5 timings and Multiword DMA Mode 0 1 2 with independent timing of up to 4 drives Integrated 10 x 32 bit read ahead posted write buffers for each channel total 20 Dwords Dedicated pins of ATA interface for each channel Supports tri state IDE signals for swap bay USB interface One root hub with two USB ports based on OpenHCI 1 0a specification Supports FS 12Mbits s...

Page 85: ...TA SMBCLK RI J SD7 RSTDRV IOCHKJ GPI1 GPI0 GND GND GND GND GND GND GPO1 GPO20 GPIO19 GPIO18GPIO17 K SD5 IRQ9 SD6 MSCLK MSDATA GND GND GND GND GND GND LLBJ DOCKJ GPIO16 GPIO15GPIO14 L SD3 DREQ2 SD4 KBCLK KBDATA GND GND GND GND GND GND IRQ8J SUSTAT1J PWRBTNJ GPIO13 GPIO12 M IOCHRDY SD0 SD1 NOWSJ SD2 GND GND GND GND GND GND PWG HOTKEYJ RSMRSTJ LBJ LID N IOWJ SA19 SMEMRJ AEN SMEMWJ GND GND GND GND GND...

Page 86: ...IRDYJ I O G2 USBP0 I O A16 PIDED6 I O D6 PAR I O G3 GPO4 O A17 PIDED10 I O D7 AD12 I O G4 INTCJ I O A18 PIDED3 I O D8 CBEJ0 I O G5 INTDJ I O A19 D9 AD3 I O G6 VCC P A20 D10 CLKRUNJ I O G15 VCC P B1 D11 SIDED6 I O G16 PIDEDRQ I B2 AD22 I O D12 SIDED11 I O G17 PIDEIORJ O B3 AD19 I O D13 SIDED1 I O G18 CPURST O B4 AD16 I O D14 SIDEIOWJ O G19 A20MJ O B5 DEVSELJ I O D15 SIDEA0 O G20 INIT O B6 AD15 I O ...

Page 87: ... DACKJ2 O J17 GPO20 O M19 LBJ I T6 BALE O J18 GPIO19 I O M20 LID I T7 LA23 I O J19 GPIO18 I O N1 IOWJ I O T8 LA20 I O J20 GPIO17 I O N2 SA19 O T9 DACKJ0 O K1 SD5 I O N3 SMEMRJ O T10 MEMWJ I O K2 IRQ9 I O N4 AEN O T11 DREQ6 I K3 SD6 I O N5 SMEMWJ O T12 ROMKBCSJ O K4 MSCLK O N8 GND P T13 RTCAS O K5 MSDATA I O N9 GND P T14 RTCRW O K8 GND P N10 GND P T15 IRQ1I I O K9 GND P N11 GND P T16 GPO12 O K10 GN...

Page 88: ... P V4 SA5 I O M4 NOWSJ I R15 VCC P V5 SA2 I O M5 SD2 I O R16 GPO17 O V6 M16J I O M8 GND P R17 GPO16 O V7 LA22 I O M9 GND P R18 GPO15 O V8 LA19 I O M10 GND P R19 GPO14 O V9 DREQ0 I M11 GND P R20 GPO13 O V10 SD8 I O M12 GND P T1 REFSHJ I O V11 DACKJ7 O M13 GND P T2 SA13 I O V12 SD13 I O V13 SPKR O A20 R3 DACKJ1 O V14 XD1 I O B1 T5 DACKJ2 O V15 XD5 I O W20 P2 DACKJ3 O V16 ACPWR I Y1 Y9 DACKJ5 O V17 G...

Page 89: ...13 GND P Y1 C3 AD20 I O J8 GND P Y2 A2 AD21 I O J9 GND P Y3 SA6 I O B2 AD22 I O K10 GND P Y4 SA3 I O C2 AD23 I O K11 GND P Y5 SA0 I O D3 AD24 I O K12 GND P Y6 IO16J I D2 AD25 I O K13 GND P Y7 LA21 I O D1 AD26 I O K8 GND P Y8 LA18 I O E3 AD27 I O K9 GND P Y9 DACKJ5 O E2 AD28 I O L10 GND P Y10 SD9 I O E1 AD29 I O L11 GND P Y11 DREQ7 I E4 AD30 I O L12 GND P Y12 SD15 I O F3 AD31 I O L13 GND P Y13 EXTS...

Page 90: ...20 GPIO10 I O P4 IORJ I O U17 GPIO11 I O N1 IOWJ I O L20 GPIO12 BATSEL0 I O D5 IRDYJ I O L19 GPIO13 BATSEL1 I O T15 IRQ1I KBINH I O K20 GPIO14 BATSEL2 I O U4 IRQ3 I O K19 GPIO15 BATSEL3 I O T4 IRQ4 I O K18 GPIO16 I O U3 IRQ5 I O J20 GPIO17 I O T3 IRQ6 I O J19 GPIO18 I O U2 IRQ7 I O J18 GPIO19 I O L16 IRQ8J I U20 GPO0 PCSJ O K2 IRQ9 I O J16 GPO1 ZZ O U7 IRQ10 I O H5 GPO2 CPU_STPJ O W7 IRQ11 I O H4 ...

Page 91: ... V3 SA8 I O A14 SIDEAKJ O N18 OSC32KII I W2 SA9 I O E14 SIDEDRQ I N20 OSC32KO O V2 SA10 I O B14 SIDERDY I D6 PAR I O W1 SA11 I O C14 SIDEIORJ O E10 PCICLK I U1 SA12 I O D14 SIDEIOWJ O D4 PCIRSTJ O T2 SA13 I O N16 SIRQI I C10 PHLDAJ I R2 SA14 I O N17 SIRQII I B10 PHOLDJ O R4 SA15 I O H19 SMBCLK I O D19 PIDEA0 O P1 SA16 I O H18 SMBDATA I O D18 PIDEA1 O P3 SA17 O N3 SMEMRJ O D20 PIDEA2 O P5 SA18 O N5...

Page 92: ...6 SERRJ I G15 VCC P G16 PIDEDRQ I W16 SETUPJ I G6 VCC P G17 PIDEIORJ O D15 SIDEA0 O P6 VCC P F16 PIDEIOWJ O E15 SIDEA1 O P15 VCC P F17 PIDERDY I C15 SIDEA2 O R14 VCC P M16 PWG I B15 SIDECS1J O R15 VCC P L18 PWRBTNJ I A15 SIDECS3J O R7 VCC P T1 REFSHJ I O B13 SIDED0 I O R6 VDD5 P H20 RI I D13 SIDED1 I O N15 VDD5S P T12 ROMKBCSJ O A12 SIDED2 I O U14 XD0 I O M18 RSMRSTJ I C12 SIDED3 I O V14 XD1 I O J...

Page 93: ...re Supports Two Floppy Drives Directly Configurable Open Drain Push pull Output Drivers Supports Vertical Recording Format 16yte Data FIFO 100 IBM2 Compatibility Detects All Overrun and Underrun Conditions Sophisticated Power Control Circuitry PCC Including Multiple Power down Modes for Reduced Power Consumption DMA Enable Logic Data Rate and Drive Control Registers 480 Address Up to Eight IRQ and...

Page 94: ...FO IrDA 1 1 Compliant TEMIC HP Module Support Consumer IR SHARP ASK IR 480 Address Up to Eight IRQ and Three DMA Options Multi mode Parallel Port with ChiProtect Standard Mode IBM PC XT PC AT and PS 2 Compatible Bidirectional Parallel Port Enhanced Parallel Port EPP Compatible EPP 1 7 and EPP 1 9 IEEE 1284 Compliant IEEE 1284 Compliant Enhanced Capabilities Port ECP ChiProtect Circuitry for Protec...

Page 95: ...esting and use Both on chip UARTs are compatible with the NS16C550 The parallel port is compatible with IBM PC AT architecture as well as IEEE 1284 EPP and ECP The FDC37C67x incorporates sophisticated power control circuitry PCC The PCC supports multiple low power down modes The FDC37C67x supports the ISA Plug and Play Standard Version 1 0a and provides the recommended functionality to support Win...

Page 96: ...2 50 Service Guide 2 3 3 Pin Configuration Figure 2 4 FDC37C67 TQFP Pin Diagram ...

Page 97: ...Major Chips Description 2 51 Figure 2 5 FDC37C67 QFP Pin Diagram ...

Page 98: ... DRQ1 O24 48 DMA Request 2 1 DRQ2 O24 52 DMA Request 3 8042 P12 1 DRQ3 P12 O24 IO24 47 DMA Acknowledge 1 1 nDACK1 I 49 DMA Acknowledge 2 1 nDACK2 I 51 DMA Acknowledge 3 8042 P16 1 nDACK3 P16 I IO24 54 Terminal Count 1 TC I 34 I O Read 1 nIOR I 35 I O Write 1 nIOW I Clocks 1 19 14 318MHz Clock Input 1 CLOCKI ICLK Infrared Interface 2 61 Infrared Rx 1 IRRX 1 62 Infrared Tx 1 IRTX O24 Power Pins 8 18...

Page 99: ...ce 8 95 Receive Serial Data 2 lnfrared Rx 1 RXD2 lRRX I 96 Transmit Serial Data 2 lnfrared Tx 1 TXD2 lRTX O24 98 Request to Send 2 Sys Addr 12 Parallel IRQ 5 1 nRTS2 SA12 IRQ5 O4 I O24 OD24 Note0 99 Clear to Send 2 Sys Addr 13 Parallel IRQ 6 1 nCTS2 SA 13 IRQ6 I I O24 OD24 Note0 100 Data Terminal Ready Sys Addr 14 Parallel IRQ 7 1 nDTR2 SA 14 IRQ7 O4 I O24 OD24 Note0 97 Data Set Ready 2 Sys Addr 1...

Page 100: ...fer type is OD24 Refer to the configuration section for more information Note 1 For 1 2it addressing SAO SA11 only nCS should be tied to GND For 1 6it external address qualification address bits SA11 SA15 can be ORed together and applied to nCS The nCS pin functions as SA11 in full 1 6it Internal Address Qualification Mode CR24 6 controls the FDC37C67x addressing modes Note 2 The n as the first le...

Page 101: ...CLK 33 SERIRQ IRQ3 SERIRQ Controlled by SERIRQSEL LD8 CRCO 2 51 nDACK3 8042 P16 nDACK3 52 DRQ3 8042 P12 DRQ3 Controlled by DMA3SEL LD8 CRCO 1 92 nR12 8042 P16 IRQ12 nR12 94 nDCD2 8042 P12 IRQ11 nDCD2 Controlled by 8042COMSEL LD8 CRCO 3 and SERIRQSEL LD8 CRCO 2 95 RXD2 IRRX RXD2 96 TXD2 IRTX TXD2 Controlled by IR Option Register LD5 CRF1 6 97 nDSR2 SA15 IRQ10 nDSR2 98 nRTS2 SA12 IRQ5 nRTS2 99 nCTS2...

Page 102: ...2 56 Service Guide 2 3 6 Block Diagram Figure 2 6 FDC37C67 Block Diagram ...

Page 103: ...st Mode capability and BIOS ROM support Flexible Memory Configurations 64 Bit memory interface for EDO Two four or eight 256Kx 16 DRAMs I MB 2MB 3MB or 4MB One or two 512Kx32 DRAMs 2MB or 4MB Four 256Kx16 plus two 128Kx32 3MB Two 128Kx32 DRAMs IMB Four 128Kx16 DRAMs IMB High Performance Deep write buffers CRT Support 135 MHz RAMDAC Hardware Multimedia Support Zoom Video port YUV input from System ...

Page 104: ... 1024 x 24bpp 36 bit direct interface to color and monochrome single drive SS and dual drive DD STN TFT panels Flexible On chip Activity Timer facilitates ordered shutdown of the display system Advanced Power Management feature minimizes power usage in Normal operation Standby Sleep modes Panel Off Power Saving Mode VESA Standards supported VAFC Port for display of Live Video DPMS for CRT power do...

Page 105: ...SDK support Dynamic Resolution Switching VGA Graphics applications in Windows VESA DDC extensions VESA DPMS extensions Property Sheet to change Refresh Display Seamless Windows Support Boot time resolution adjustment DIVE EnDlVE DCAF Multimedia Software Video Port Mana8er for ZV Port PCVideo DLL plus Tuner with DK Board Software Utilities DebugVGA Auto testing of all video modes ChipsVGA ChipsEXT ...

Page 106: ...modes Auto Resolution Switch Multiple Refresh Rates NTSC PAL support Extended Modes Extended BIOS Functions 1024x768 TFT DSTN Color Panels Multiple Panel Support 8 panels built in Get Panel Type Function HW Popup Interface Monitor Detect Pop Up Support SMI and Hot Key support System BIOS Hooks Set Active Display Type Save Restore Video State Setup Memory for Save Restore SMI Entry Point Int 15 Cal...

Page 107: ...hnology enables TF T quality viewing on an STN panel The 65555 provides the best color fidelity for the widest variety of active and passive panels in the market 2 4 3 2 Reduced Flicker Output Television The television output circuitry supports both NTSC and PAL television formats The 65555 provides filtering circuitry to reduce the flicker circuitry to reduce the flicker seen when displaying CRT ...

Page 108: ...image representation Additionally the HiQVPro also supports TFT panels up to 36 bit interface The HiQVideo family offers a variety of programmable features to optimize display quality Vertical centering and stretching are provided for handling modes with less than 480 lines on 480line panels Horizontal and vertical stretching capabilities are also available for both text and graphics modes for opt...

Page 109: ...f the 32 bit configurations allow an additional 256K x 16 device to be used for an external 16 bit wide STN DD buffer as shown above The 65555 supports both video capture playback and external STN DD buffer at the same time 2 4 4 Pin Descriptions 2 4 4 1 Introduction The following pages contain the BGA ball assignments and a list of all the pins for the 65555 GUI Accelerator The pins are divided i...

Page 110: ... Flat Panel Display Interface CRT Interface Power Ground and Standby Control Video Interface Miscellaneous Pin name in parentheses indicate alternate functions 2 4 4 2 Top View BGA Ball Assignments Figure 2 7 65555 BGA Ball Assignments Top View ...

Page 111: ...Major Chips Description 2 65 2 4 4 3 Bottom View BGA Ball Assignments Figure 2 8 65555 BGA Ball Assignments Bottom View ...

Page 112: ...as the same timing as AD0 3I but delayed by one clock The bus master drives PAR for address and write data phases the target drives PAR for read data phases K2 FRAME In Low Cycle Frame Driven by the current master to indicate the beginning and duration of an access Assertion indicates a bus transaction is beginning while asserted data transfers continue de assertion indicates the transaction is in...

Page 113: ...eport system errors where the result will be catastrophic address panty error data panty errors for Special Cycle commands etc This output is actively driven for a single PCI clock cycle synchronous to BCLK and meets he same setup and hold time requirements as all other bused signals SERR is not driven high by the chip after being asserted but is pulled high only by a weak pull up provided by the ...

Page 114: ...nd configuration the address is a DWORD address During data phases AD0 7 contain the LSB and 24 31 contain the MSB Write data is stable and valid when IRDY is asserted read data is stable and valid when TRDY is asserted Data transfers only during those clocks when both IRDY and TRDY are asserted C BE3 0 Command Type Support 0000 Interrupt Acknowledge 0001 Special Cycle 0010 I O Read Y 0011 I O Wri...

Page 115: ... register XR71 for complete details on configuration options MA8 through MA15 are also serve as the data bus for the BIOS ROM during system startup i e before the system enables the graphics controller memory interface D15 B16 A17 C15 A16 B15 C14 A15 B14 C13 A14 B13 D12 C12 A13 B12 MB0 RMA0 MBI RMAI MB2 RMA2 MB3 RMA3 MB4 RMA4 MB5 RMA5 MB6 RMA6 MB7 RMA7 MB8 RMA8 MB9 RMA9 MB10 RMA10 MB11 RMA11 MB12 ...

Page 116: ... MCLKOUT Out Low Output Enable for BIOS ROM May be configured as MCLK output in test mode D11 A11 C16 B17 H20 J19 P18 R19 ASAL ASAH CASBL CASBH ASCL ASCH ASDL CASH Out Out Out Out Out Out Out Out High High High High High High High High CAS for dual CAS EDO DRAM Memory data byte mask signals one mask signal for each of the eight data bytes in the 64 bit Qword The masking is performed on a per byte ...

Page 117: ...igh High High High High High High High High High High High High High High High High High High Flat panel data bus of up to 36 bits Y5 SHFCLK Out High Shift Clock Pixel clock for nat panel data W5 FLM Out High First Line Marker Flat Panel equivalent of VSYNC Y4 LP CL1 DE BLANK Out High Latch Pulse may also be called CL1 Flat Panel equivalent of HSYNC May also be configured as DE display enable or B...

Page 118: ...2 72 Service Guide Table 2 8 65555 Pin Functions Ball Pin Name Type Active Description Note All signals listed above are powered by DVCC and GND ...

Page 119: ... DD DD TFT TFT TFT TFT HR STN SS STN SS STN DD STN DD STN DD Pin Pin Name 8 bit 8 bit 16 bit 9 12 16bit 18 24 bit 36 bit 18 24 bit 8 it 4bP 8 bit 4bp 8 bit 4bp 8 bit 4bp 8 bit W6 P0 P0 UD3 UD7 B0 B0 FB0 FB0 R1 R1 UR1 UR0 UR0 V7 P1 P1 UD2 UD6 B1 B1 FB1 B1 B1 G1 UG1 UG0 UG0 Y6 P2 P2 UD1 UD5 B2 B2 FB2 FB2 G2 B1 UB1 UB0 UB0 W7 P3 P3 UD0 UD4 B3 B3 FB3 FB3 R3 R2 UR2 UR1 LR0 V8 P4 P4 LD3 UD3 B4 B4 FB4 SB...

Page 120: ...D RED GREEN BLUE and RSET are powered by AVCC and AGND Power Ground and Standby Control U5 AVCC VCC Analog power and ground pins for noise isolation for the internal color palette DAC AVCC should be isolated from digital VCC as described in the Functional Description of the internal color palette DAC For proper DAC operation AVCC should not be greater than IVCC AGND should be common with digital g...

Page 121: ...for complete details Usable with either the video data port or the flat panel interface May also be configured to output VCLK in test mode R18 U20 T19 R17 T18 U19 V20 T17 U18 V19 W20 W19 U17 V18 Y19 V18 VP0 VP1 VP2 VP3 VP4 VP5 VP6 VP7 VP8 VP9 VP10 VP11 VP12 VP13 VP14 VP15 In In In In In In In In In In In In In In In In High High High High High High High High High High High High High High High High...

Page 122: ...s as the input for an external reference oscillator usually 14 31818 MHz All timings of the 65555 are derived from this primary clock input source Can be configured to be used as an input for an externally provided MCLK through a strapping option and register programming For normal operation TDI should be used as the input for an externally provided MCLK V1 GPIO0 ACTI I O High General Purpose l O ...

Page 123: ...cates a 0 5mm lead pitch QFP Table 2 9 M38813M4 XXXHP Functions Parameter Function Basic instructions 71 Instruction execution time 0 5µs shortest instruction at 8MHz oscillation frequency Oscillation frequency 8MHz max Memory size ROM 16384 bytes of user area RAM 512 bytes Input output ports P0 P4 8 bit X 5 P5 4 bit X 1 P6 2 bit X 1 Serial l O Clock synchronous or asynchronous Timers 8 bit presca...

Page 124: ...rrent 10mA 15mA for P24 P27 Operating temperature range 20 to 85 C Device structure CMOS silicon gate Package M38813M4 XXXHP 64 pin plastic molded QFP 0 5mm lead pitch 2 5 3 Pin Configuration The Pin configuration of the M38813M4 XXXHP is shown in below Figure 2 9 M38813 Pin Diagram ...

Page 125: ... O port with the same function as port P0 The input is CMOS TTL level and output is CMOS 3 state P24 P27 is the LED driver port which capable of handling large current drive P3c P37 I O port P3 An 8 bit CMOS l O port with the same functions as port P0 The input is CMOS level and output is CMOS 3 state This port is used as input of key on wake up and comparator functions Pull up transistor can be c...

Page 126: ...2 80 Service Guide 2 5 4 1 Functional Block Diagram Figure 2 10 M38813 Block Diagram ...

Page 127: ...r down and suspend resume that is indispensable with power conscious application 2 6 1 Features Built in OPL3 Supports Sound Blaster Game compatibility Supports Windows Sound System compatibility Supports Plug Play ISA 1 0a compatibility Full Duplex operation Built in MPU401 Compatible MIDI I O port Built in Joystick Built in the 3D enhanced controller including all the analog components Supports ...

Page 128: ...2 82 Service Guide 2 6 2 Pin Diagram Figure 2 11 YMF715 Block Diagram ...

Page 129: ...d analog output VREFI 1 I Voltage reference input VREFO 1 O Voltage reference output AUXIL l I Left AUX1 input AUX1R l I Right AUX1 input AIJX2L l I Left AUX2 input AUX2R 1 I Right AUX2 input LINEL 1 I Left LINE input LINER 1 I Right LINE input MIC 1 I MIC input MIN 1 I Monaural input TRECL 1 Left Treble capacitor TRECR 1 Right Treble capacitor SBFLTL 1 Left SBDAC filter SBFLTR 1 Right SBDAC filte...

Page 130: ...DI Data Transfer VOLUP 1 I Schmitt 2mA Hardware Volume Up VOLDW l I Schmitt 2mA Hardware Volume Down X331 1 I CMOS 2mA 33 8688 MHz X33O 1 O CMOS 2mA 33 8688 MHz X24I 1 I CMOS 2mA 24 576 MHz X24O 1 O CMOS 2mA 24 576 MHz AVDD 2 Analog Power Supply put on 5 0V DVDD 3 Digital Power Supply put on 5 0 V or 3 3V AVSS 2 Analog GND DVSS 4 Digital GND Note I Input Pin with Pull up Resistor Schmitt TTL Schmi...

Page 131: ...ter configuration problems you may need to run Setup Please also refer to Appendix E BIOS Post Checkpoints when a problem arises To activate the Setup Utility press F2 after you hear a beep while the Extensa logo is being displayed When Silent Boot described later in this chapter is disabled a message displays telling you when you can press F2 to run the Setup Utility BIOS V3 0 016384 KB Memory Go...

Page 132: ...ility SETUP Utility Basic System Settings Startup Configuration Onboard Devices Configuration System Security Power Management Load Default Settings Move Highlight Bar Select Esc Exit Press the cursor keys to move the highlight bar then press Enter to make a menu selection ...

Page 133: ...s the parameters in this screen Settings in boldface are the default and suggested parameter settings Table 3 1 Basic System Settings Parameters Parameter Description Setting or Format Date Sets the computer s system date Day of the Week Month Day Year Time Sets the computer s system time Hour Min Sec Floppy Disk A Selects the floppy disk drive type 1 44 MB 3 5 inch None Floppy Disk B Selects the ...

Page 134: ... Description Setting Boot Display Sets the display device computer LCD and or external monitor to use when the computer starts boots up When set to Auto the computer outputs to the external monitor if one is connected otherwise the computer outputs to the LCD Auto Both Memory Test Runs or skips the memory test Enabled Disabled Silent Boot Hides or displays or hides the POST Power On Self Test scre...

Page 135: ... System Selects the operating system the computer is running Set this parameter to the appropriate OS to get maximum performance Windows 95 DOS Windows NT USB Function Support Selects support for USB Universal Serial Bus Enable this parameter if you are connecting USB device s to the computer Disabled Enabled ...

Page 136: ...change the setting of the highlighted parameter To exit this screen and return to the main screen press Esc The following table describes the parameters in this screen Settings in boldface are the default and suggested parameter settings Table 3 3 Onboard Devices Configuration Parameters Parameter Description Setting Serial Port Enables or disables the serial port Enabled Disabled Base Address Set...

Page 137: ...t Enables or disables the parallel port Enabled Disabled Base Address Sets the I O base address of the parallel port 378h 278h 3BCh IRQ Sets the interrupt request IRQ channel of the parallel port 7 5 Operation Mode Selects the operation mode of the parallel port ECP Extended Capabilities Port supports a 16 byte FIFO first in first out which can be accessed by host DMA cycles and PIO cycles boostin...

Page 138: ...r settings Table 3 4 System Security Parameters Parameter Description Setting Diskette Drive Control Sets the control level of the diskette drive Normal Disabled Write Protect All Sectors Write Protect Boot Sector Hard Disk Drive Control Sets the control level of the diskette drive Normal Disabled Write Protect All Sectors Write Protect Boot Sector Setup Password Sets and enables the setup passwor...

Page 139: ...s in boldface are the default and suggested parameter settings Table 3 5 Power Management Settings Parameters Parameter Description Setting or Format Heuristic Power Management Mode Enables or disables heuristic power management mode Enabled Disabled Display Always On When enabled the computer does not enter display standby mode Disabled Enabled System Sleep State Setting this item determines whic...

Page 140: ...so brings up the power management screen An additional page shown below is added to this function which appears only via Fn F6 System Information Reference Serial Number 11111111117 System BIOS Version V3 0 R01 A0 EN BIOS Release Date 2 14 97 VGA BIOS Version 0 2 5 R01 F0 Processor Pentium Internal Cache 16KB Enabled Processor Speed 150 MHz External Cache 256KB Enabled Total Memory 16 MB Pointing ...

Page 141: ...n you select the Load Default Settings item from the main screen a dialog box appears asking you to confirm that you want to reset all settings to their factory defaults Load Setup Default Settings Are you sure Yes No Choose Yes to confirm or No if otherwise ...

Page 142: ...al screwdriver Tweezers Plastic stick The screws for the different components vary in size During the disassembly process group the screws with the corresponding components to avoid mismatch when putting back the components 4 1 General Information 4 1 1 Before You Begin Before proceeding with the disassembly procedure make sure that you do the following 1 Turn off the power to the system and all p...

Page 143: ...4 2 Service Guide Figure 4 1 Removing the Battery Pack Removing all power sources from the system prevents accidental short circuit during the disassembly process ...

Page 144: ... not force cables out of the connectors CONNECTORS WITH LOCKS Unplugging the Cable To unplug the cable first unlock the connector by pulling up the two clasps on both sides of the connector with a plastic stick Then carefully pull out the cable from the connector Plugging the Cable To plug the cable back first make sure that the connector is unlocked then plug the cable into the connector With a p...

Page 145: ...ternal module Remove the keyboard and heat sink assembly Remove the motherboard for service or replacement 1 Remove the keyboard 2 Disassemble the housing Remove the touchpad 1 Remove the keyboard 2 Disassemble the housing Replace the LCD Remove the display Install CPU Remove the keyboard and heat sink assembly Install additional memory The flowchart on the succeeding page gives a clearer and more...

Page 146: ... Heat Sink Release Latches CPU Heat Sink Lower Case Unplug Cables CPU Board Upper Case Keyboard Board Remove FDD CD ROM DC DC Covert Bd M B Audio Board Speaker Touch Pad PCMCIA Socket Charger Board Unplug Inverter Cable Display Module Display Bazel Inverter Board Remove LED Cover LCD Pannel Ax3 Bx2 Dx4 Ex4 Fx3 Bx1 Cx4 Dx8 Gx2 Ix2 Ix3 Jx1 Bx2 Hx2 Ix4 Figure 4 3 Disassembly Sequence Flowchart ...

Page 147: ...mory Door 3 Remove the memory modules from its shipping container 4 Align the connector edge of the memory module with the key in the connector Insert the edge of the memory module board into the connector Use a rocking motion to fully insert the module Push downward on each side of the memory module until it snaps in place To remove the memory module release the slot locks found on both ends of t...

Page 148: ...run after installing additional memory for the computer to hibernate properly If Sleep Manager is active it will automatically adjust the hibernation file on your notebook If you are using an operating system other than Windows 95 or DOS you may need to re partition your hard disk drive to allow for the additional memory Check with your system administrator ...

Page 149: ...4 8 Service Guide 4 3 Removing the Modem Board When you open the memory door you can also access and replace the modem board See figure below Figure 4 6 Removing the Modem Board ...

Page 150: ...ve bay cover 2 Press the hard disk drive bay cover release and slide the cover out to remove it Set aside the cover 3 Pull the hard disk drive tab to remove the hard disk drive from the hard disk drive bay Figure 4 7 Removing the Hard Disk Drive 4 Store the hard disk drive in an antistatic bag If you want to install a new hard disk drive reverse the steps described above ...

Page 151: ...oard 1 Slide out the two display hinge covers on both sides of the notebook Figure 4 8 Removing the Display Hinge Covers 2 Using a pointed instrument unlock the keyboard locks Then pull out and flip down the keyboard to expose the keyboard connectors Figure 4 9 Removing the Keyboard ...

Page 152: ...Disassembly and Unit Replacement 4 11 3 Unplug the keyboard connectors CN3 and CN5 from the keyboard touchpad board Set aside the keyboard Figure 4 10 Unplugging the Keyboard Connectors ...

Page 153: ...in major components like the internal drive CD ROM or floppy CPU and the main board Follow these steps 4 6 1 Removing the Heat Sink Assembly Follow these steps to remove the heat sink assembly 1 Pull up and remove the LED cover Figure 4 11 Removing the LED Cover 2 Remove the five screws that secure the heat sink assembly to the housing Figure 4 12 Removing the Heat Sink Assembly ...

Page 154: ...remove the display 1 Remove two screws on the bottom and two screws on the rear of the unit Figure 4 13 Unplugging the Display Cable 2 Open the display and remove two screws then pull up the display cable CN9 and unplug the inverter cable CN8 Figure 4 14 Removing the Display Hinge Screws ...

Page 155: ... Internal Drive Follow these steps to remove the internal drive 1 Pull up the FDD CD module latches 2 Unplug the two internal drive cables CN17 for FDD CN17 and CN20 for CD ROM 3 Pull out the internal drive and set it aside Ensure the drive cables do not become hooked on the inside frame assembly when removing and reinstalling the drive ...

Page 156: ...ent 4 15 Figure 4 16 Removing the Internal Drive 4 6 4 Replacing the CPU Gently pull out the CPU heat sink and the CPU board CN21 from the mainboard Figure 4 17 Replacing the CPU Reverse the steps above to insert a replacement CPU ...

Page 157: ...lug the touchpad cable CN6 from the keyboard touchpad board and the audio board cable CN14 speaker cables CN13 and CN15 and optionally the fan connector found just above the speaker cables CN12 from the mainboard Figure 4 18 Removing Cables 2 Detach the top cover from the bottom cover Figure 4 19 Detaching the Top Cover ...

Page 158: ... lower case ten total screws two screws shorter than the rest found on the front corners of the computer Figure 4 20 Removing the Bottom Screws 2 Remove the keyboard touchpad board CN18 Remove two screws and remove the plate that covers the DC DC converter board Figure 4 21 Removing the Keyboard Touchpad Board and DC DC Converter Board Cover ...

Page 159: ...erter board CN7 Figure 4 22 Removing the DC DC Converter Board 4 Unplug the battery charger connector CN22 and remove four screws that secure the motherboard to the base assembly Then pull up to remove the mainboard Figure 4 23 Removing the Mainboard ...

Page 160: ...HE CHARGER BOARD Unplug the charger board containing the power switch DC in jack and PS 2 port Figure 4 24 Removing the Charger Board REMOVING THE PCMCIA SOCKETS The PC Card Connector Module is normally part of the motherboard spare part The following removal procedure is for reference only Figure 4 25 Removing the PCMCIA Sockets ...

Page 161: ...ns below describe the removal process of these components REMOVING THE HARD DISK DRIVE HEAT SINK Pull up to remove the hard disk drive heat sink from the top cover Figure 4 26 Removing the Hard Disk Drive Heat Sink REMOVING THE AUDIO BOARD Pull up to remove the audio board from the top cover Figure 4 27 Removing the Audio Board ...

Page 162: ...e and touchpad buttons 2 Unplug the touchpad cable J1 and remove the touchpad main sensor and connector unit REMOVING THE SPEAKERS 1 Unlock the speaker by pushing outward on its locks 2 The flip up the wire that holds the speaker in place and remove the speaker Figure 4 28 Removing the Touchpad and Speakers ...

Page 163: ... oval LCD bumpers at the top of the display use a pointed instrument to remove the two mylar stickers on the bottom of the display Figure 4 29 Removing the LCD Bumpers 2 Remove four screws on the display bezel Figure 4 30 Removing the Display Bezel Screws STN and TFT LCDs use the same bezel but different panels ...

Page 164: ...ove the display bezel by first pulling on the inside of the bezel sides and lower bezel area Then pull up the top bezel area Figure 4 31 Removing the Display Bezel 4 Unplug two connectors and remove the inverter board Figure 4 32 Removing the Inverter Board ...

Page 165: ...4 Service Guide 5 Remove three screws on the four sides of the display panel one screw holds and grounds the LCD cable Then tilt the LCD Panel away for the display cover Figure 4 33 Removing the LCD Panel ...

Page 166: ...wedish Finnish A Arabic X Swiss German C Chinese Y Swiss French D Danish K Korean F French Z w o Keyboard CPU Media Bay Memory Battery 0 W O CPU W O CD ROM W O Memory W O Battery Uniload Model Bulk pack 1 P55C 166 CD ROM 16MB RAM Li Ion Battery Modem 2 P55C 166 CD ROM 16MB RAM Ni MH Battery Modem 3 P55C 150 CD ROM 16MB RAM Ni MH Battery Modem 4 P55C 133 CD ROM 16MB RAM Ni MH Battery Modem 5 P55C 1...

Page 167: ... View Diagram This appendix includes exploded view diagrams of the notebook Table B 1 Exploded View Diagram List No Description B 1 System assembly B 2 CD ROM Drive assembly B 3 LCD Module assembly B 4 Upper Case assembly B 5 Lower Case assembly B 6 LCD Bezel assembly ...

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Page 174: ...L LATCH PACK 6M 43A06 001 34 47604 001 SPRING 4 42 43A01 001 LACTCH 2 5 B 3 C A 41 50P HIT9980 STN 170MM 50 43A01 001 LCD TO MB CABLE 1 B 10 W A 10P 30 220MM INVERTER 390 50 43A02 001 WIRE FOR INVERTER TO MB 5 B 5 LCM LM9980ZWCC02 12 1 DSTN HIT 56 0740A 011 1 B 6 ASSY LCD BEZEL HIT 050 390 60 43A04 011 5 B 2 ASSY LCD PANEL HIT 050 390 60 43A05 011 5 ASSY LCD MODUL HIT9981 050 390 6M 43A05 001 FOR ...

Page 175: ...OARD KIT FOR AN390 6M 43A02 001 55 43A03 001 50 43A04 001 1 Main Board COVER LI BTY PROTECT 760I 42 46012 001 50 Components SIR MODULE IBM31T1100 56 15445 021 U1 5 SIR MODULE TEMIC TFDS6000 56 15470 001 U37 5 IC AUDIO CHIPYMF715E 71 00715 E08 U20 5 IC PCMCIA CTRL PCI125GFN V A 71 01250 B0U 1 IC CLK GEN MK1422 SO N 8P 71 01422 00A U28 5 IC CLK GEN CY2272 SSOP 48P 71 02272 00I U39 5 IC RTC BQ3285LD ...

Page 176: ...01I 1 KEYBD 88 KAS1901 0156R J 370 90 46907 01J 1 KAS1901 0163R 050 KOREA 90 46907 01K 1 KAS1901 0188R 050 NORWAY 90 46907 01N 1 85 KAS1901 0192R 050 PORT 90 46907 01P 1 KAS1901 0181R 050 SPANISH 90 46907 01S 1 KAS1901 0181R 050 UK 90 46907 01U 1 KAS1901 0185 050 SWEDEN 90 46907 01W 1 HDD HOLDER HDD CONN AL N A 390 33 43A08 001 FOR HDD 50 C A 44P FPC HDD 390 50 43A08 001 FOR HDD 5 HDD 2160MB 2 5 H...

Page 177: ...3A06 001 BATTERY COVER 50 ASSY NI MH BATY PACK BTY 031 60 43A01 021 NI MH 1 ASSY LI ION BATY PACK BTY Z31 60 43A01 031 LI ION 1 Microphone MICROPHONE EM 83 23 42008 021 5 CORD SPT 2 18 2C 7A125V1830MM 27 01618 001 MICROPHONE CORD 5 Others COVER DIMM AL 050 390 34 43A06 001 DIMM COVER 5 PLATE NAME LOGO PC AN390 40 43A02 001 ACER LOGO 50 PLT NAME EXTENSA 390 050 390 40 48406 091 EXTENSA LOGO 50 HING...

Page 178: ...erator D 9 VGA Controller Chip 65555 and VRAM D 10 CRT and LCD Connector D 11 PCMCIA Controller Chip PCI 1250 D 12 PCMCIA Socket and Power Controller TPS2206 D 13 M38813 and LED and Charger SMBUS D 14 Super I O SMC672 and RS232 MAX3243 D 15 Parallel and Serial Port D 16 USB and FIR and Buzzer and Fan D 17 Audio Chip YMF715 D 18 OP AMP LM4863 and Datarace and Jack D 19 RTC and BIOS ROM D 20 IDE Con...

Page 179: ...D8 CPUD7 HOLD HLDA 3 3 3 3 3 3 16 2 2 2 2 2 2 2 2 2 8 13 8 13 CPUINIT SMI IGNNE INTR FERR CPU_COM M IO NA CACHE BOFF AHOLD BRDY KEN SMIACT CPULOCK CLK_SEL1 CLK_SEL0 CPUA31 INV WB WT CPUA29 CPUA30 M IO CACHE KEN FERR BRDY SMI IGNNE SMIACT 12V 3 3V 8 3 3 3 2 5 2 3 2 5 2 5 CPUCLK NMI CPURST STPCLK CPUADS HITM A20M BE 0 7 W R BE 0 BE 1 BE 2 BE 3 BE 4 BE 5 BE 6 BE 7 CPUA11 CPUA12 CPUA13 CPUA14 CPUA15 C...

Page 180: ...18 MD31 E15 MD30 C16 MD29 A19 MD28 B20 M D 2 7 B 1 8 M D 2 6 C 1 9 M D 2 5 C 1 7 M D 2 4 D 1 9 M D 2 3 D 1 7 M D 2 2 E 2 0 M D 2 1 E 1 8 M D 2 0 E 1 6 M D 1 9 F 1 9 M D 1 8 F 1 7 M D 1 7 G 2 0 M D 1 6 G 1 8 M D 1 5 G 1 6 M D 1 4 H 1 9 M D 1 3 H 1 7 M D 1 2 J 2 0 M D 1 1 J 1 8 M D 1 0 J 1 6 M D 9 K 1 9 M D 8 K 1 7 M D 7 L 2 0 M D 6 L 1 8 M D 5 L 1 6 M D 4 M 1 9 M D 3 M 1 7 M D 2 N 2 0 M D 1 N 1 8 M...

Page 181: ... D A C K J 1 R 3 D A C K J 2 T 5 D A C K J 3 P 2 D A C K J 5 Y 9 D A C K J 6 W 1 0 D A C K J 7 V 1 1 S Y S C L K V 1 K B C L K G P I 9 L 4 K B D A T A G P I 1 0 L 5 K B I N H I R Q 1 I T 1 5 M S C L K G P I 1 1 K 4 M S D A T A I R Q 1 2 I K 5 R O M K B C S J T 1 2 R T C A S T 1 3 R T C R W T 1 4 R T C D S U 1 3 X D I R G P O 1 2 T 1 6 S P K R V 1 3 S P L E D W 1 3 S E R I R Q G P I 2 Y 1 8 S I R Q...

Page 182: ...7 RSTDRV RSTDRV DRQ1 DRQ3 DRQ2 DRQ0 DRQ5 DRQ6 DRQ7 5V 3 14 21 3 3 1 2 R83 47KR3 1 2 R96 10KR3 CCFT POSSTA CCFT 3 21 3 3 11 13 13 1 2 R333 1KR3 1 2 R324 1KR3 1 2 3 4 5 6 7 8 RN8 SRN10K IRQ12 IRQ14 IRQ15 IOCHRDY IO16 IRQ1 IOCHRDY 5V 5V 3 22 3 1 2 R119 100KR3 OUT 1 VDD 2 GND 3 NC 5 NC 4 UX1 S 80750SN 1 2 RX31 100KR3 1 2 R106 0R3 1 2 DZ3 MMBZ5246B PWRBTN BAT_IN PWR_SW 5V 3 3V NORMALMODE 3 3 1 2 R334 1...

Page 183: ... BW7 119 BW8 120 C E 1 2 1 VCC 122 G N D 1 2 3 C E 2 1 2 4 C E 3 1 2 5 C E 2 1 2 6 C E 3 1 2 7 VCCQ 128 U44 S32K64 7 C P U D 0 C P U D 1 C P U D 2 C P U D 3 C P U D 4 C P U D 5 C P U D 6 C P U D 7 C P U D 8 C P U D 9 C P U D 1 0 C P U D 1 1 C P U D 1 2 C P U D 1 3 C P U D 1 4 C P U D 1 5 C P U D 1 6 C209 SCD1U C208 SC2D2U16V5ZY IO_VOLTAGE 3 3V 1 2 1 2 1 C207 SCD1U C205 SCD1U C204 SCD1U C213 SC1KP ...

Page 184: ...RP39 SRN10 1 2 3 4 5 6 7 8 RP37 SRN10 1 2 3 4 5 6 7 8 RP40 SRN10 A12 A13 AA0 AA1 CAS 0 CAS 1 CAS 2 CAS 3 CAS 4 CAS 5 CAS 6 CAS 7 8 7 7 MAA0 MAA1 MSRAS 0 SDRAM_CLK0 MCAS 0 MCAS 1 MCAS 2 MCAS 3 MCAS 4 MCAS 5 MCAS 6 MCAS 7 MA12 MA13 CLKEN0 MSCAS 0 MCAS 0 MCAS 1 MCAS 4 MCAS 5 MAA0 MAA1 MD4 MD5 MD6 MD7 MA2 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47...

Page 185: ...1U C386 SCD1U C381 SC4D7U16V6ZY MD 0 63 MCAS 0 7 MD 0 63 3 1 2 1 4 7 1 3 U10A SO4066 11 10 1 4 7 1 2 U10B SO4066 SMBDATA SDRAM 8 6 6 6 6 C315 SCD1U MA 2 11 MAA0 MAA1 MSRAS 1 SDRAM_CLK2 SMBDATA_DIM1 5V CLKEN0 MSCAS 1 MCAS 0 MCAS 1 MCAS 4 MCAS 5 MD4 MD5 MD6 MD7 MA2 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MA3 MA4 MA5 2 2 2 8 6 6 6 6 1 2 R332 D...

Page 186: ...0 CPUCLK241 VDDCPU42 CPUCLK143 CPUCLK044 VSS 45 IOCLK 46 USBCLK 47 VDDQS48 U39 CY2272 CX14 SCD1U CX15 SCD1U 1 2 RX40 0R3 A V D D 1 3 1 2 R257 33R3 1 2 R256 33R3 1 2 R286 33R3 1 2 R294 33R3 1 2 R299 33R3 TP4 TP 1 C176 SC1U16V5ZY C175 SC1U16V5ZY 2 3 1 4 1 7 U38A SSAHCT125 USBCLK AUDIO14M SIO14M CPUCLK L2CLK IO_VOLTAGE 17 14 3 1 2 RX36 DUMMY C3 1 2 RX37 DUMMY C3 SLOWDWN KBD14M S I O 1 4 M A U D I O 1...

Page 187: ...7 W 1 4 P 2 8 Y 1 5 P 2 9 V 1 4 P 3 0 W 1 5 P 3 1 Y 1 6 P 3 2 V 1 5 P 3 3 Y 1 7 P 3 4 W 1 6 P 3 5 U 1 5 V P 1 5 W 1 8 V P 1 4 Y 1 9 V P 1 3 V 1 8 V P 1 2 U 1 7 V P 1 1 W 1 9 V P 1 0 W 2 0 V P 9 V 1 9 V P 8 U 1 8 N C D 6 N C C 5 N C A 1 2 GND J9 GND J10 GND J11 GND J12 G N D K 9 G N D K 1 0 G N D K 1 1 GND K12 G N D L 9 G N D L 1 0 G N D L 1 1 G N D L 1 2 GND M9 GND M10 GND M11 GND M12 RSRVD D4 U24...

Page 188: ...P42 SRN47 1 2 3 4 5 6 7 8 RP45 SRN47 1 2 3 4 5 6 7 8 RP46 SRN47 1 2 3 4 5 6 7 8 RP43 SRN47 1 2 3 4 5 6 7 8 RP41 SRN47 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 U30 IPEC330 470FS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 U25 IPEC330 470FS LCDPWR B0 B1 B2 B3 B4 B5 B6 B7 G0 G1 G2 G3 G4 G5 G6 G7 R0 R6 G0 G1 G3 G6 B0 B1 B3 B6 LCDVEE C257 SC1KP C246 SCD1U C262 SC2D2U16V5ZY DOTCLK LCD_V...

Page 189: ...VCC D6 B _ C A D 0 H 1 9 B _ C A D 1 G 2 0 B _ C A D 2 H 1 8 B _ C A D 3 F 2 0 B _ C A D 4 G 1 9 B _ C A D 5 F 1 9 B _ C A D 6 G 1 8 B _ C A D 7 G 1 7 B _ C A D 8 E 1 9 B _ C A D 9 E 1 8 B _ C A D 1 0 D 1 9 B _ C A D 1 1 C 2 0 B _ C A D 1 2 D 1 8 B _ C A D 1 3 E 1 7 B _ C A D 1 4 B 2 0 B _ C A D 1 5 C 1 9 B _ C A D 1 6 C 1 8 B _ C A D 1 7 B 1 5 B _ C A D 1 8 A 1 5 B _ C A D 1 9 C 1 4 B _ C A D 2 0...

Page 190: ...75CIMX 3 1 2 RX29 22KR3 SYS_COM SMBCLK SMBDATA 3 3V 3 3V A_VPP A_SLOT_VCC B_SLOT_VCC B_VPP 11 11 11 11 11 11 11 11 11 11 11 C151 SCD1U ARSVD D14 A_VS1 ACPAR ARSVD A18 ACPERR ACBLOCK ACGNT ACSTOP ACINT ACDEVSEL ACCLK ACTRDY ACAD7 ACCBE 0 ACAD8 ACAD9 ACAD10 ACAD11 ACAD12 ACAD13 ACAD14 ACAD15 ACCBE 1 ACAD16 11 11 11 11 11 11 11 11 11 11 11 BRSVD D14 B_VS1 BRSVD A18 BCPAR BCPERR BCBLOCK BCGNT BCSTOP B...

Page 191: ...O L 8 K C O L 9 K C O L 1 0 K C O L 1 1 K C O L 1 2 K C O L 1 3 K C O L 1 4 K C O L 1 5 K C O L 1 6 5V C146 SCD1U KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8 3 19 XD 0 7 KROW1 TDATA TCLK 1 8 1 8 3 3 3 3 IOW IOR SA2 IRQ1 IRQ12 MSCLK ROMKBCS CLK_SEL0 CLK_SEL1 CRT I O W I O R K B C S S A 2 M S D A T A M S C L K I R Q 1 2 I R Q 1 XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0 8 3 4 3 4 22 4 22 23 22 23 1 2 R123 100R3 ...

Page 192: ...20 23 20 23 20 23 INDEX TRK0 DSKCHG RDATA WRTPRT SIO14M SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 3 3 3 3 3 4 21 3 4 21 4 17 17 IOR IOW RSTDRV TC IRQ4 IRQ3 DACK 1 3 16BIT_AEN SA8 SA9 SA10 SLCT PE BUSY ACK IRQ4 IRQ3 DACK 1 DACK 2 DACK 3 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 AEN IOW IOR RSTDRV TC SA11 DR0 MTR1 STEP WDATA WGATE IOCHRDY FDIR HDSEL IRQ7 IRQ10 IRQ11 IRQ5 IRRX INIT SLCTIN AUTOFD IRQ5 IRQ11 IRQ7 IRQ10 DR...

Page 193: ...FDD PRT PNOCON PPD5 PPD7 PPD6 FDD 5V C11 SC180P 14 14 14 14 14 14 14 14 C18 SC680P C19 SC680P C220 SC680P C221 SC680P PRI1 PDTR1 PCTS1 PRTS1 PSIN1 PDSR1 PDCD1 PSOUT1 Serial Port COM1 Wide GND line C14 SC680P C15 SC680P C16 SC680P C17 SC680P 1 2 3 4 5 6 7 8 9 11 10 CN3 RS232 9 4 D 3 3 14 1 2 R78 10KR3 1 2 R235 10KR3 1 2 R196 100R3 1 2 R195 100R3 1 2 1 4 7 U8A SSHCT14 9 10 8 1 4 7 U47C TSHCT08 12 13...

Page 194: ...V 3 1 2 D1 S1N4148 1 2 R209 DUMMY R3 1 2 R17 0R3 1 2 R30 100KR3 1 2 R31 82R3 1 2 C22 ST4D7U OVCR 0 DIRECTLY CONNECTING TO CHASIS PIN 6 7 3 4 23 3 4 23 3 23 14 1 2 R66 100KR3 C21 SCD1U IRTX USB_OUT IN 3 3V C217 SC470P 1 2 3 4 5 6 7 CN1 BERG USB USBP00 USBP01 USBPWR1 3 C2 SCD1U 2 1 3 Q3 2SJ317 C20 SCD1U 1 2 R16 10KR3 1 2 R4 33R5 1 2 BZ1 BUZZER 3 FIR_EN FIR 5V 5V 5V GND to pin4 C1 SCD1U 1 2 R1 DUMMY ...

Page 195: ... 2 L 9 4 T R E C L 9 5 T R E C R 9 6 S Y N S H R 9 7 S Y N S H L 9 8 S B F L T L 9 9 S B F L T R 1 0 0 U20 YMF715 C72 SC3300P50V3KX C71 SCD22U16V3ZY C86 SCD22U16V3ZY LINE_IN_L RDATA_RACE VDDA S B F L T R S B F L T L S Y N S H L S Y N S H R T R E C R T R E C L A U X 2 R A U X 2 L 18 18 C287 SC1U25V5MY C288 SC1U25V5MY C95 SC1U10V5KX C96 SC1U10V5KX C99 SC1KP C286 SC1KP SOUND_L SOUND_R V D D A VDDD O ...

Page 196: ...R LINE_IN_L LINE_IN_R MIC_IN OP_HP_IN LINE_OUT_L LINE_OUT_R LINE_IN_L LINE_IN_R MIC_IN 5V 17 23 17 23 17 23 17 23 23 1 2 R214 20KR3 1 2 R77 33KR3 1 2 C299 ST100U10VDM 1 2 R73 47KR3 CZ6 SC150P SOUND_R OP_VREF OUTR INR 5VA 3 2 1 8 4 U5A SLM1458 C75 SCD1U 1 2 R218 20KR3 C259 SCD1U MIC_IN OP_VREF LINE_OUT_R 11 12 21 C54 SCD1U C264 SCD1U C50 SCD1U A_VS2 MODEM_MIC A_VS2 5VA 11 12 1 2 R219 47KR3 C263 SC1...

Page 197: ...3 1 2 R68 0R3 OSC32KI 5V DC_5VSB 3 3 22 RSTDRV XDIR CHRG_IRQ XDIR XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 1 2 3 4 5 6 7 8 RN6 SRN0 C98 SCD1U A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8 A8 9 G 19 DIR 1 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7 12 B8 11 VCC 20 GND 10 U23 TSACT245 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 5V RESERVED CONTROL FROM BOM 1 2 3 4 5 6 7 8 RN7 SRN0 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SKT1 SSKT32 XD0 XD1 XD2...

Page 198: ...76 4K7R3 CDROM_LED SIRQII SIDEIOW SIDEA0 LED INTR INTR 3 3 17 1 2 R267 100KR3 C327 SCD1U C317 SC1KP 1 2 R263 0R3 1 2 C324 ST10U16VBM CD_AUDL CD FDD 3MODE SIDED1 SIDED3 SIDED5 SIDED7 5V 5V FDD CD ROM CONN 17 14 14 14 14 14 14 14 14 14 14 14 14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 31 33 35 37 39 32 34 36 38 40 43 42 41 44 CN17 MOLEX CONN40A 1 2 RX25 4K7R3 ...

Page 199: ...1 IOCHRDY 5V 3 4 3 3 3 21 3 21 3 21 3 3 3 SBHE MEMR MEMW BIOSA16 BIOSA17 ROMKBCS LA17 LA18 LA19 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SD0 SD1 SD2 SD3 SD4 LA17 LA18 LA19 SBHE MEMR MEMW 1 2 3 4 5 6 7 8 9 10 RP71 SRP10K 1 2 3 4 5 6 7 8 9 10 RP72 SRP10K 9 10 8 1 4 7 U40C SSHCT32 IOCHK LA17 LA18 LA19 LA20 LA22 LA23 LA21 SBHE MEMW MEMR IOCHK IOR IOW 5V 5V 5v 5V 5V 3 4 C338 SCD1U 3 1 1 2 2 3...

Page 200: ...V5KX C41 SC10U50V CZ3 SCD1U CZ4 SC1U10V5KX C23 SC10U35V0ZY 1 2 C231 ST150U10VDM 1 2 C48 ST150U10VDM VCPU1 VCPU2 PWRGIN PWRGOOD_VCC PWGIN ON OFF PWRGOOD_VCC DCBATOUT 2 9V DC_5VSB 12V 5V 1 2 R57 470R3 ON OFF SYSTEM_ON PWRGIN DCBATOUT 3 13 3 2 1 Q1 RN2424 C25 SC1KP 1 2 3 Q2 2N7002 1 2 R15 1MR3 1 2 R44 DUMMY R3 1 2 R45 DUMMY R3 DISABLE W_PROTEC DC_IN CHGR_S_CLK DC_IN DCBATOUT 3 13 23 1 2 C272 ST4D7U C...

Page 201: ...T_FDD_SMI MSCLK MSDATA KBCLK KBDATA PSLCTIN PPD3 PPD4 PPD5 PPD6 PPD7 PACK PBUSY PPE PSLCT PRI1 PDTR1 PCTS1 PSOUT1 PRTS1 PSIN1 PDSR1 RDATA WRTPRT TRK0 DOCK_R DOCK_G DOCK_DDC_DATA DOCK_HSYNC DOCK_VSYNC DOCK_B VGA14M DC_IN DC_IN 8 14 10 10 13 22 13 22 14 15 23 14 15 23 14 14 14 14 14 C240 SCD1U C241 SC1KP 1 2 RX26 47KR3 DOCK 5V 3 4 16 3 16 14 14 14 14 14 10 10 14 1 2 R212 100KR3 GND 1 IN 2 IN 3 EN 4 ...

Page 202: ...ting Set default SS SP 0 400 1Ch CMOS shutdown byte test battery and check sum Note Several parts of the POST routine require the system to be in protected mode When returning to real mode from protected mode the processor is reset therefore POST is re entered In order to prevent re initialization of the system POST reads the shutdown code stored in location 0Fh in CMOS RAM Then it jumps around th...

Page 203: ...board matrix 4Ch ChipUp initialization for CPU clock checking 54h Process VGA shadow region 58h Set POST screen mode Graphic or Text Display Acer or OEM logo if necessary Display Acer copyright message if necessary Display BIOS serial number 59h Hook int vector 1ch for POST quiet boot 5Ch Memory testing 5Ah SMRAM test and SMI handler initialization 4Eh Audio initialization 60h External Cache sizin...

Page 204: ...rameter table setup 89h Get CPU MUX Note This routine is to identify the user set CPU frequency not CPU required frequency 90h Display POST status if necessary 93h Rehook int1c for quiet boot 94h Initialize I O ROM A4h Initialize security feature A8h Setup SMI parameters A0h Initialize Timer counter for DOS use ACh Enable NMI Enable parity checking Set video mode B0h Power on password checking Dis...

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