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PAD128 Manual
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Manual MPAD128.D1g
corrects for gain errors. This is the recommended calibration method and should be
performed once during initialization of the board each time a process is started.
Bit D2, Zero, performs only a simple offset correction calculation. This process takes
about 10 microseconds, but is not generally recommended unless speed is critical.
Bit D1, Reset, will halt the A/D chip, useful if you need to suddenly stop the current
acquisition process. Set the bit to 1 to stop whatever the chip is doing. Additionally,
setting this bit sets the chip's internal pointer to point 0, and clears the conversion FIFO.
Bit D0, when set to 1, tells the A/D to acquire data from the point list. Setting the bit
to 0 will stop the acquisition after completion of the current point. Additionally, if you
read a zero in this bit, it indicates the A/D process is stopped.
Base A 14, A/D Status
DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
numb er of co nversio ns in
FIFO
point being
acquired
used for advanced functions
Bits DF through DB indicate how many points of data are in the FIFO. It is important
to avoid reading more data from the FIFO than is stored in it, as doing so can corrupt
incoming data.
Bits DA through D8 hold the current point number being acquired.
Base + 14 write functions provide useful interrupt and FIFO control mechanisms. If you
need interrupt functionality, read the LM12H458 chip specification for details.
Base A 16, Timeout Value
DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
This is the most significant 16-bits of a 21 bit delay timeout value
The A/D chip will pause for 32 x delay+2 clock cycles. Each clock cycle is 0.136
microseconds long. Once the delay is completed, operation resumes with the A/D
sampling the current point, and continuing to the next as normal.
Base A 18, A/D FIFO Data
DF DE DD DC DB D
A D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
point or sign sign Co nversio n Da ta
If CH mode is set at base+10 bit 5, bits DF-DD indicate the point that the data is from.