ABB REG650 ANSI, Technical Manual

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TSTSC
BLKSC
BLOCK
TSTAUTSY
AUTOSYOK
PHDIFFME
FRDIFFME
UDIFFME
PHDIFFA
UOKSC
UDIFFSC
OR
t
0-60 s
AND
AND
AND
AND
AND
AND
t
50 ms
phaseAngleDifferenceValue
frequencyDifferenceValue
voltageDifferenceValue
1
1
AND
tSCA
Note! Similar logic for Manual Synchrocheck.
1
FRDIFFA
IEC08000018_3_en.vsd
OperationSC = On
UDiffSC
FreqDiffA
PhaseDiffA
Bus voltage >80%
of
GblBaseSelBus
Line voltage >80%
of
GblBaseSelLine
PhaseDiff > 60°
t
80 ms
100 ms
INADVCLS
AND
AND
PhaseDiff < 5°
IEC08000018 V3 EN
Figure 164: Simplified logic diagram for the Auto Synchrocheck function
12.1.7.3 Synchronizing
When the function is set to OperationSynch = On the measuring will be performed.
The function will compare the values for the bus and line voltage with internally preset
values that are set to be 80% of the set
UBase selected for GlbBaseSelBus and
GlbBaseSelLine , which is a supervision that the voltages are both live. Also the
voltage difference is checked to be smaller than the internally preset value 0.10, which
is a p.u value of set voltage base values. If both sides are higher than the preset values
and the voltage difference between bus and line is acceptable, the measured values are
also compared with the set values for acceptable frequency
FreqDiffMax and
FreqDiffMin , rate of change of frequency FreqRateChange and phase angle, which
has to be smaller than the internally preset value of 15 degrees.
1MRK 502 048-UEN A
Section 12
Control
329
Technical manual