ABACO CPCI-7055RC Hardware Reference Manual Download Page 17

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16 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual

Publication No. 500-657055-000 Rev. G

References

IBM PowerPC 750FX/GX RISC Microprocessor

IBM Microelectronics Division

1580 Route 52, Bldg. 504

Hopewell Junction, NY 12533-6351

www.ibm.com or

www-3.ibm.com/chips/

Marvell MV64460/1/2 System Controller for PowerPC

Marvell Semiconductor

700 First Ave.

Sunnyvale, CA 94089

(408) 222-2500

www.marvell.com

PCI Local Bus Specification, Rev. 2.2

Marvell Semiconductor

P.O. Box 14070

Portland, OR 97214

(800) 433-5177 (U.S.)

(503) 797-4207 (International)

(503) 234-6762 (FAX)

PCI 6150 PCI-to-PCI Bridge Chip (IDE)

PLX Technology, Inc.

870 Maude Ave.

Sunnyvale, CA 94085 USA

Tel: 1-800-759-3735
Tel: 1-408-774-9060

Fax: 1-408-774-2169

Email: [email protected]

Web Site: www.plxtech.com

PLX PCI-6254 (HB6) Dual Mode Universal PCI-to-PCI Bridge Datasheet

PLX Technology Inc.

870 Maude Ave.

Sunnyvale, CA 94085

www.plxtech.com

CMC Specification, P1386/Draft 2.0 from:

IEEE Standards Department
Copyrights and Permissions

445 Hoes Lanes, P.O. Box 1331

Piscataway, NJ 08855-1331

PMC Specification, P1386.1/Draft 2.0 from:

IEEE Standards Department
Copyrights and Permissions

Piscataway, NJ 08855-1331

445 Hoes Lanes, P.O. Box 1331

Piscataway, NJ 08855-1331, USA

Summary of Contents for CPCI-7055RC

Page 1: ...l service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE INSPECTION Remotely inspect equipment before purchasing with our interactive website at www instraview com LOOKING FOR MORE INFORMATION Visit us on the web at www artisantg com for more information on ...

Page 2: ... 7055 CPCI 7055RC PowerPC Based CompactPCI Single Board Computer THE CPCI 7055RC IS DESIGNED TO MEET THE EUROPEAN UNION EU RESTRICTIONS OF HAZARDOUS SUBSTANCE RoHS DIRECTIVE 2015 863 CURRENT REVISION Publication No 500 657055 000 Rev G ...

Page 3: ...s registered with an approved Producer Compliance Scheme PCS and subject to suitable contractual arrangements being in place will ensure WEEE is processed in accordance with the requirements of the WEEE Directive Abaco Systems will evaluate requests to take back products purchased by our customers before August 13 2005 on a case by case basis A WEEE management fee may apply ...

Page 4: ... D subscript and binary numbers have a b subscript The prefix 0x shows a hexadecimal number following the C programming language convention Thus One dozen 12D 0x0C 1100b The multipliers k M and G have their conventional scientific and engineering meanings of x103 x106 and x109 respectively and can be used to define a transfer rate The only exception to this is in the description of the size of mem...

Page 5: ...https www abaco com Abaco Documents This document is distributed via the Abaco website You may register for access to manuals via the website LINK https www abaco com download cpci 7055cpci 7055rc hardware reference manual Third party Documents ANSI VITA Standards LINK http www vita com NOTE Technical literature describing components used on the CPCI 7055RC is available from the manufacturers webs...

Page 6: ...in the Technical Support database and allocate it a unique Case number for use in any future correspondence Alternatively you may also contact Abaco s Technical Support via LINK support abaco com Returns If you need to return a product there is a Return Materials Authorization RMA form available via the website Support page LINK https www abaco com support Do not return products without first cont...

Page 7: ...following two conditions 1 this device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation FCC Class A NOTE This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection aga...

Page 8: ...ority to operate the equipment Canadian Regulations The VMICPCI 7055 CPCI 7055RC Class A digital apparatus complies with Canadian ICES 003 NOTE Any equipment tested and found compliant with FCC Part 15 for unintentional radiators or EN55022 previously CISPR 22 satisfy ICES 003 ...

Page 9: ... S1 23 1 6 Installation 24 1 7 Installing PMCs 25 1 7 1 PMC Site VIO 25 1 8 Front Rear Panel Connectors 28 1 9 LED Definition 29 1 10 RS232 Serial Port COM0 30 1 11 Using the Serial Port Debug 33 2 Standard Features 34 2 1 CPU 34 2 2 Physical Memory 34 2 3 PCI Device Interrupt Map 35 2 4 Integrated Peripherals 35 2 5 Ethernet Controller 36 2 5 1 10BaseT 36 2 5 2 100BaseTX 36 2 5 3 1000BaseT 36 3 E...

Page 10: ...2 Cold Reset 52 B 1 3 Warm Reset 52 B 1 4 Get Self Test Results 53 B 1 5 Set ACPI Power State 54 B 1 6 Get ACPI Power State 55 B 1 7 Get Device GUID command 56 B 1 8 Broadcast Get Device ID 57 B 1 9 Master Write Read 57 B 1 10 Set Event Receiver 58 B 1 11 Get Event Receiver 58 B 1 12 Get Sensor Reading 59 B 1 13 FRU Inventory Area Info 60 B 1 14 Read FRU Data 61 B 1 15 Write FRU Data 61 B 1 16 Get...

Page 11: ...d PMC 2 J21 Connector Pinout 46 Table A 8 PMC 1 J12 and PMC 2 J22 Connector Pinout 47 Table A 9 PMC 1 J13 Connector Pinout 48 Table A 10 PMC 1 J13 Connector Pinout 49 Table A 11 PMC 1 J14 Connector Pinout 50 Table B 1 NetFn 0x06 Cmd 0x01 51 Table B 2 NetFn 0x06 Cmd 0x02 52 Table B 3 NetFn 0x06 Cmd 0x03 52 Table B 4 NetFn 0x06 Cmd 0x04 53 Table B 5 NetFn 0x06 Cmd 0x06 54 Table B 6 NetFn 0x06 Cmd 0x...

Page 12: ...1 5 Installing a PMC on the VMICPCI 7055 CPCI 7055RC 26 Figure 1 6 VMICPCI 7055 CPCI 7055RC PMC Backside Mounting 27 Figure 1 7 Front Panel LED Definitions 29 Figure 1 8 Serial Port Access Using Example Desktop Windows Based OS 30 Figure 1 9 Hyperterminal New Connection Window 31 Figure 1 10 COM Port Window 32 Figure 1 11 COM1 Properties Window 32 Figure 1 12 VMICPCI 7055 CPCI 7055RC Serial Port C...

Page 13: ... COM2 via CompactPCI J3 Real Time clock calendar Front panel reset switch The Marvell chipset allows the VMICPCI 7055 CPCI 7055RC to provide enhanced features such as Ultra DMA IDE support The standard desktop features of the VMICPCI 7055 CPCI 7055RC are described in Chapter 2 Standard Features of this manual The VMICPCI 7055 CPCI 7055RC provide features useful to embedded applications such as PIC...

Page 14: ... To cast out or to reload a 256 bit cache line required four access cycles On the 750GX this bus has been expanded to 256 bits As a result cache line data bursts can be read from or written to the cache array in a single cycle reducing cache contention between the BIU and the load store unit L2 Cache The 750GX processor is available with 1 MByte of L2 cache The cache is two way set associative eac...

Page 15: ...ar fabric supports non blocking concurrent connections among peripherals at full bus speeds delivering break through performance for advanced Internet infrastructure equipment The Discovery III system controllers are highly integrated and offer leading edge peripherals on chip including up to three Gigabit Media Access Controllers MACs up to two PCI X interfaces and DDR memory support In addition ...

Page 16: ... Bridge 33 MHz Dual ATA 100 CompactFlash Socket 512 Kbyte Flash PLCC32 64 Mbyte Flash RTC 32 Kbyte NVRAM 10 100 1000 LAN Gbit PHY Two Single or One Double Wide PMC Site PMC Site 1 I O 64 bit Device Bus 64 bit 66 MHz PCI Bus JTAG COP 133 MHz 200 MHz DDR400 RJ45 COM0 RS232 UART 1 4 Xcrv IPMI UART RJ45 w mag RGMII TTL PCI PCI Secondary IDE RGMII RGMII Gbit PHY Gbit PHY Mag Mag PICMG 2 16 Gigabit Ethe...

Page 17: ... U S 503 797 4207 International 503 234 6762 FAX PCI 6150 PCI to PCI Bridge Chip IDE PLX Technology Inc 870 Maude Ave Sunnyvale CA 94085 USA Tel 1 800 759 3735 Tel 1 408 774 9060 Fax 1 408 774 2169 Email info plxtech com Web Site www plxtech com PLX PCI 6254 HB6 Dual Mode Universal PCI to PCI Bridge Datasheet PLX Technology Inc 870 Maude Ave Sunnyvale CA 94085 www plxtech com CMC Specification P13...

Page 18: ...ld MA 01880 617 224 1100 617 224 1239 FAX www picmg org Packet Switching Backplane Specification PICMG 2 16 R1 0 PCI Industrial Computer Manufacturers Group 301 Edgewater Place Suite 220 Wakefield MA 01880 617 224 1100 617 224 1239 FAX www picmg org The following is useful information related to the operation of the I2 C controllers The I2 C Specification version 2 0 Philips Semiconductor 811 East...

Page 19: ...ng boards 1 3 Hardware Setup The VMICPCI 7055 CPCI 7055RC are factory populated with user specified options as part of the VMICPCI 7055 CPCI 7055RC ordering information The RAM size is not user upgradable To change RAM size contact Customer Care to receive a Return Material Authorization RMA The VMICPCI 7055 CPCI 7055RC are tested for system operation and shipped with factory installed header jump...

Page 20: ... G Handling and Installation 19 Figure 1 1 VMICPCI 7055 CPCI 7055RC PMC Sites and Jumper Locations J2 J1 J3 J22 J21 J13 J14 J5 J11 J12 E16 J29 J28 J23 U2 D82 S2 D90 D89 E192 1 E252 1 E18 2 1 20 19 S1 KP5 KP6 T2 T1 U286 U228 PMC 1 PMC 2 ...

Page 21: ...system controller will only be accepted until the boot done LED is turned off Table 1 1 Board Connectors Headers Switches and Jumpers Connectors Header Jumpers and Switches Function J1 J2 J3 and J5 CompactPCI Backplane Connectors J11 J12 J13 J14 PMC Slot 1 J21 J22 J23 PMC Slot 2 J28 LAN 0 J29 COM 0 D82 Front Panel Status Indicators D89 Ethernet Port 2 Status LEDs D90 Ethernet Port 1 Status LEDs E1...

Page 22: ...r The location of both headers is shown in the diagram on the following page It will be required for the user to access both headers E5 and E18 in order to utilize the COP interface To use the COP port E5 1 Strap pin 4 to pin 7 on E18 2 Connect emulator to E5 Figure 1 2 COP Interface COP Header JTAG Header 20 19 18 17 15 16 14 13 11 12 10 9 7 8 6 5 3 4 2 1 HDR_2x10 ...

Page 23: ...22 VMICPCI 7055 CPCI 7055RC Hardware Reference Manual Publication No 500 657055 000 Rev G E18 JTAG Header E5 COP Header ...

Page 24: ... Positions Pin Position Function 1 On Boot from solder down Flash 64 Mbyte Off Boot from PLCC32 2 On Write protect all NVRAM and I2C bus Off No write protection for NVRAM on I2C bus 3 On Write protect all NVRAM on DEVbus Off No write protection for NVRAM on DEVbus 4 On COM Port 0 loopback Off COM Port 0 normal 5 On COM Port 1 COM1 RS422 485 mode Off COM Port 1 COM1 RS232 mode 6 On COM Port 1 loopb...

Page 25: ...ion and setup 2 The VMICPCI 7055 CPCI 7055RC must be installed in a designated slot of the CompactPCI backplane see symbols above for selection of the correct slot NOTE Air flow as measured at the output side of heatsink is to be greater than 400LFM 3 Insert the VMICPCI 7055 CPCI 7055RC into a CompactPCI chassis system controller or peripheral slot While ensuring that the board is properly aligned...

Page 26: ... devices can easily drive TTL signaling Higher speed PCI buses utilize 3 V termination Figure 1 4 Keypin Installation and Setup CAUTION When Installing the keypins on the two PMC sites the two keypins MUST be setup for the same voltage level Either in the 5 V position installed or in the 3 3 V removed position This is due to the keypins being on the same bus if installed incorrectly this could cau...

Page 27: ...C on the VMICPCI 7055 CPCI 7055RC CAUTION When installing the keypins on the two PMC sites the two keypins MUST be installed for the same voltage level i e either in the 5 V position or in the 3 3 V position This is due to the keypins being on the same bus if installed incorrectly this could cause damage to the board ...

Page 28: ...Publication No 500 657055 000 Rev G Handling and Installation 27 Figure 1 6 VMICPCI 7055 CPCI 7055RC PMC Backside Mounting Back of VMICPCI 7055 CPCI 7055RC SBC Solder Side ...

Page 29: ...55RC provide rear I O support for the following COM1 COM2 PMC I O for one expansion site and IDE These signals are accessed using the VMIACC 7055 ACC 7055RC RTMs which terminate into industry standard connectors The front panel connectors including connector pinouts and orientation for the VMICPCI 7055 CPCI 7055RC are defined in Appendix A Rear panel connections are defined in the appropriate RTM ...

Page 30: ...llow LED Activity Green LED Link Indicates Link Speed LED off indicates 10Base T Yellow LED indicates 100Base TX Green LED indicates 1000Base T LAN0 Yellow LED Indicates the Ethernet is active When LED is Green indicates it has linked LAN0 Indicates link speed Yellow LED indicates 100Base TX Green LED indicates 1000Base T and no LED indicates 10Base T LAN0 Board Reset Button Boot Done Red LED Indi...

Page 31: ...te terminal with a Windows based OS go to Accessories then to Hyperterminal and click on Hyperterminal When using a Linux based OS go to the root directory at the command prompt and type in Minicom Figure 1 8 Serial Port Access Using Example Desktop Windows Based OS 1 The following window will appear for Windows based OS From the Connection window type in the name 7055 You can also choose an icon ...

Page 32: ...Publication No 500 657055 000 Rev G Handling and Installation 31 Figure 1 9 Hyperterminal New Connection Window 2 Select the COM port you will be using After selecting the COM port click OK ...

Page 33: ...indow will appear Select the Baud rate bits per second The default Baud rate for the VMICPCI 7055 CPCI 7055RC is 9600 Click OK Figure 1 11 COM1 Properties Window Bits per second 9600 Data bits 8 Parity None Stop bits 1 Flow control None 7055 COM0 Baud Rates 2400 4800 9600 19200 9600 Baud Rate 1 None None 8 2400 4800 9600 19200 57600 115200 38400 ...

Page 34: ...al port See Figure 1 12 below for an example of connecting the VMICPCI 7055 CPCI 7055RC with a PC using the RS232 serial port and cable Figure 1 12 VMICPCI 7055 CPCI 7055RC Serial Port Connection NOTE One adapter of the applicable type is included with the VMICPCI 7055 CPCI 7055RC Table 1 5 RJ45 to Standard DB9 Adapter Pinout RJ45 to DB9 COM Port Adapter PN Type 360 010030 002 DB9 Female null mode...

Page 35: ...e the standard features of the VMICPCI 7055 CPCI 7055RC 2 1 CPU The VMICPCI 7055 CPCI 7055RC CPU is factory populated with an IBM PowerPC processor The processor speed and Memory CompactFlash size are user specified as part of the VMICPCI 7055 CPCI 7055RC ordering information To change memory size or CompactFlash size contact Customer Care to receive a Return Material Authorization RMA 2 2 Physica...

Page 36: ...y The primary channel is routed to an optional onboard CompactFlash socket The secondary channel is routed out of the CompactPCI J5 backplane connector to an optional RTM that terminates into a standard 40 pin header This channel can support a master and slave drive The IDE interface on the VMICPCI 7055 CPCI 7055RC supports Ultra ATA 33 Ultra ATA 66 and Ultra ATA 100 drives and automatically deter...

Page 37: ... based on a 100BaseTX standard uses unshielded twisted pair cables and an RJ45 connector 100BaseTX has a maximum length of 100 meters 2 5 3 1000BaseT The VMICPCI 7055 CPCI 7055RC support 1000BaseT using the Marvell MV64460 controller The interface uses shielded cables with four pairs of conductors along with an RJ45 connector on the front panel and two channels routed to the CompactPCI J3 connecto...

Page 38: ...peripheral controller it allows the local VMICPCI 7055 CPCI 7055RC processors to configure and control the onboard local subsystem independent from the CompactPCI bus host processor The VMICPCI 7055 CPCI 7055RC local PCI subsystem is presented to the CompactPCI bus host as a single CompactPCI device As a system controller the bridge acts as a standard transparent PCI to PCI bridge For detailed inf...

Page 39: ...and the CompactPCI J3 are option dependent Contact Sales for ordering information NOTE The system backplane must support the PICMG 2 16 specification and a PICMG 2 16 compatible switch is required for each Ethernet channel 3 3 PICMG 2 9 Support The VMICPCI 7055 CPCI 7055RC provide a Zircon PM peripheral management controller that supports a subset of IPMI 1 5 commands via PICMG 2 9 Refer to Append...

Page 40: ...ounce and reliable operation in noisy environments The key prevents misalignment of the board when installing in the chassis Figure below depicts the J1 connector and the connector pinout Table A 1 J1 Connector and Pinout Pin No Row A Row B Row C Row D Row E Row F 25 VCC_5 0E CPCI_REQ64 CPCI_ENUM VCC_3 3E VCC_5 0E GND 24 CPCI_AD 1 VCC_5 0E CPCI_VIO_C24 CPCI_AD 0 CPCI_ACK6 4 GND 23 VCC_3 3E CPCI_AD...

Page 41: ...O CPCI_AD 2 5 CPCI_AD 2 4 GND 7 CPCI_AD 30 CPCI_AD 29 CPCI_AD 28 GND CPCI_AD 2 7 GND 6 CPCI_REQ CPCI_PCI_PRES ENT CPCI_3V_C6 CPCI_CLK CPCI_AD 3 1 GND 5 N C N C CPCI_RST GND CPCI_GNT GND 4 CPCI_IPMB_P WR CPCI_HEALTHY CPCI_VIO_C4 N C N C GND 3 CPCI_INTAR CPCI_INTBR CPCI_INTCR CPCI_5V_ D3 CPCI_INTD R GND 2 CPCI_TCK VCC_5 0E CPCI_TMS N C CPCI_TDI GND 1 VCC_5 0E VCC_ 12 0E CPCI_TRST VCC_12 0E VCC_5 0E ...

Page 42: ...ND 18 N C N C N C GND N C GND 17 N C GND BP_RST CPCI_REQ6 CPCI_GNT6 GND 16 N C N C CPCI_DEG GND N C GND 15 N C GND CPCI_FAL CPCI_REQ5 CPCI_GNT5 GND 14 CPCI_AD 3 5 CPCI_AD 3 4 CPCI_AD 33 GND CPCI_AD 32 GND 13 CPCI_AD 3 8 GND VCC_VIO CPCI_AD 37 CPCI_AD 36 GND 12 CPCI_AD 4 2 CPCI_AD 4 1 CPCI_AD 40 GND CPCI_AD 39 GND 11 CPCI_AD 4 5 GND VCC_VIO CPCI_AD 44 CPCI_AD 43 GND 10 CPCI_AD 4 9 CPCI_AD 4 8 CPCI_...

Page 43: ...ut Pin No Row A Row B Row C Row D Row E Row F 19 GND GND GND GND GND GND 18 LPA_BI_DA LPA_BI_DA 2 GND LPA_BI_DC LPA_BI_DC GND 17 LPA_BI_DB LPA_BI_DB 2 GND LPA_BI_DD LPA_BI_DD GND 16 LPB_BI_DA LPB_BI_DA 2 GND LPB_BI_DC LPB_BI_DC GND 15 LPB_BI_DB LPB_BI_DB 2 GND LPB_BI_DD LPB_BI_DD GND 14 GND GND GND GND GND GND 13 SP2_RTS SP1_RI SP2_DSR SP2_DCD SP2_CTS GND 12 SP1_RTS SP2_DTR VCC_5 0 SP1_CTS GND GND...

Page 44: ...tes the J5 connector and the connector pinout 1 N C N C N C G2_G_LINK10 G2_Y_ACT GND Table A 3 J3 Connector and Pinout Pin No Row A Row B Row C Row D Row E Row F Table A 4 J5 Connector and Pinout Pin No Row A Row B Row C Row D Row E Row F 22 PMC1_IO 5 PMC1_IO 4 PMC1_IO 3 PMC1_IO 2 PMC1_IO 1 GND 21 PMC1_IO 10 PMC1_IO 9 PMC1_IO 8 PMC1_IO 7 PMC1_IO 6 GND 20 PMC1_IO 15 PMC1_IO 14 PMC1_IO 13 PMC1_IO 12...

Page 45: ...DE_D 9 IDE_CS1 IDE_D 1 VCC_5 0 GND 6 IDE_DIOW IDE_D 10 HD_ACTA IDE_D 2 N C GND 5 UDMA_Sec_DE TECT IDE_D 11 IDE_CS3 IDE_D 3 GND GND 4 IDE_CBLIO IDE_D 12 IDE_INTRQ IDE_D 7 N C GND 3 N C IDE_D 13 IDE_DMAC K IDE_D 6 N C GND 2 N C IDE_D 14 IDE_DMAR Q IDE_D 5 VCC_3 3 GND 1 N C IDE_D 15 IDE_RESE T IDE_D 4 N C GND Table A 4 J5 Connector and Pinout Pin No Row A Row B Row C Row D Row E Row F Table A 5 J28 C...

Page 46: ...ure A 2 Serial Connector and Pinout NOTE An RJ45 to DB9 adapter cable Part Number 360 010030 002 non RoHS or 42G7602 0002 RoHS is shipped with the VMICPCI 7055 CPCI 7055RC The RJ45 pinout supports asynchronous RS232 mode only Table A 6 J29 Connector Pinout COM0 SERIAL PORT CONNECTOR J29 PIN Assignment 1 DCD 2 RTS 3 GND 4 TXD 5 RXD 6 GND 7 CTS 8 DTR DB9 Assignment 1 DCD 2 RXD 3 TXD 4 DTR 5 GND 6 NC...

Page 47: ...11 J21 PMC Connector J11 J21 Left Side Right Side Left Side Right Side Pin Name Pin Name Pin Name Pin Name 1 GND 2 12 V 33 FRAME 34 GND 3 GND 4 INTA 35 GND 36 IRDY 5 INTB 6 INTC 37 DEVSEL 38 5 0 V 7 PMC1_PRS NT 8 5 0 V 39 PCIXCAP 40 LOCK 9 INTD 10 NC 41 SDONE 42 PMC1_SB0 11 GND 12 NC 43 PAR 44 GND 13 CLK 14 GND 45 Px_VIO 46 AD 15 15 GND 16 GNT 0 47 AD 12 48 AD 11 17 REQ0 18 5 0 V 49 AD 9 50 5 0 V ...

Page 48: ...Px_VIO 33 GND 34 N C 3 GND 4 N C 35 TRDY 36 3 3 V 5 Px_VIO 6 GND 37 GND 38 STOP 7 GND 8 N C 39 PERR 40 GND 9 N C 10 N C 41 3 3 V 42 SERR 11 BMODE2 12 3 3 V 43 C BE 1 44 GND 13 RESET 14 GND 45 AD 14 46 AD 13 15 3 3 V 16 GND 47 M66EN 48 AD 10 17 NC 18 GND 49 AD 8 50 3 3 V 19 AD 30 20 AD 29 51 AD 7 52 N C 21 GND 22 AD 26 53 3 3 V 54 N C 23 AD 24 24 3 3 V 55 N C 56 GND 25 IDSEL 26 AD 23 57 N C 58 N C ...

Page 49: ... 33 GND 34 AD 48 3 GND 4 C BE 7 35 AD 47 36 AD 46 5 C BE 6 6 C BE 5 37 AD 45 38 GND 7 C BE 4 8 GND 39 VIO 40 AD 44 9 VIO 10 PAR64 41 AD 43 42 AD 42 11 AD 63 12 AD 62 43 AD 41 44 GND 13 AD 61 14 GND 45 GND 46 AD 40 15 GND 16 AD 60 47 AD 39 48 AD 38 17 AD 59 18 AD 58 49 AD 37 50 GND 19 AD 57 20 GND 51 GND 52 AD 36 21 VIO 22 AD 56 53 AD 35 54 AD 34 23 AD 55 24 AD 54 55 AD 33 56 GND 25 AD 53 26 GND 57...

Page 50: ...48 3 GND 4 C BE 7 35 AD 47 36 AD 46 5 C BE 6 6 C BE 5 37 AD 45 38 GND 7 C BE 4 8 GND 39 VIO 40 AD 44 9 VIO 10 PAR64 41 AD 43 42 AD 42 11 AD 63 12 AD 62 43 AD 41 44 GND 13 AD 61 14 GND 45 GND 46 AD 40 15 GND 16 AD 60 47 AD 39 48 AD 38 17 AD 59 18 AD 58 49 AD 37 50 GND 19 AD 57 20 GND 51 GND 52 AD 36 21 VIO 22 AD 56 53 AD 35 54 AD 34 23 AD 55 24 AD 54 55 AD 33 56 GND 25 AD 53 26 GND 57 VIO 58 AD 32 ...

Page 51: ..._IO 9 10 PMC1_IO 1 0 41 PMC1_IO 4 1 42 PMC1_IO 42 11 PMC1_IO 1 1 12 PMC1_IO 1 2 43 PMC1_IO 4 3 44 PMC1_IO 44 13 PMC1_IO 1 3 14 PMC1_IO 1 4 45 PMC1_IO 4 5 46 PMC1_IO 46 15 PMC1_IO 1 5 16 PMC1_IO 1 6 47 PMC1_IO 4 7 48 PMC1_IO 48 17 PMC1_IO 1 7 18 PMC1_IO 1 8 49 PMC1_IO 4 9 50 PMC1_IO 50 19 PMC1_IO 1 9 20 PMC1_IO 2 0 51 PMC1_IO 5 1 52 PMC1_IO 52 21 PMC1_IO 2 1 22 PMC1_IO 2 2 53 PMC1_IO 5 3 54 PMC1_IO...

Page 52: ...mands B 1 1 Get Device ID This command is used to retrieve the Intelligent device s Hardware Revision Firmware Software Revision and Sensor and Event Interface Command specification revision information Table B 1 NetFn 0x06 Cmd 0x01 1 Depends on the version of firmware installed on the board 2 Depends on the type of device Byte Value Data Field Comments Request data Response data 1 00 Completion c...

Page 53: ...threshold values and other power up default states to be restored Table B 2 NetFn 0x06 Cmd 0x02 B 1 3 Warm Reset While there are two commands one for a cold reset and one for a warm reset the firmware does not distinguish between them and always performs a cold reset Table B 3 NetFn 0x06 Cmd 0x03 Byte Value Data Field Comments Request data Response data 1 00 Completion code Byte Value Data Field C...

Page 54: ...Corrupted or inaccessible data or devices Fatal hardware error Reserved Device specific internal failure 3 XXh If byte 2 is 55h 56h or FFh then 00h If byte 2 is 58h or All other then device specific If byte 2 is 57h then Self test error bit field 1b means failed 0b means unknown 7 1b cannot access SEL device 6 1b cannot access SDR repository 5 1b cannot access FRU device 4 1b IPMB signal lines do ...

Page 55: ...power state instead it can be used to turn off on power to the board Table B 5 NetFn 0x06 Cmd 0x06 Byte Value Data Field Comments Request data 1 XXh ACPI System power state The Abaco IPMI does not have control over the system power state Therefore this byte is ignored 2 XXh ACPI Device power state 7 1b set device power state 0b don t change device power state 6 0 device power state 00h Fully on 03...

Page 56: ...urns whether the board has its power turned off on Table B 6 NetFn 0x06 Cmd 0x07 Byte Value Data Field Comments Request data Response data 1 00 Completion code 2 2Ah ACPI System Power State 7 reserved 6 0 System power state 2Ah unknown The Abaco IPMI subsystem does not have control over the system power 3 XXh ACPI Device Power State 00h Fully on 03h Power off 2Ah unknown power state has not been i...

Page 57: ...agement controller This information can be used in conjunction with the SDR information to verify that a particular controller is still present in the system Table B 7 NetFn 0x06 Cmd 0x08 Byte Value Data Field Comments Request data Response data 1 00h Completion code 2 XXh node 3 XXh node 4 XXh node 5 XXh node 6 XXh node 7 XXh node MS byte 8 XXh clock seq low 9 XXh clock seq high and reserved MS b...

Page 58: ...ad accesses to the IPMB or private buses behind the management controller Table B 8 NetFn 0x06 Cmd 0x52 Byt e Value Data Field Comments Request data 1 XXh Bus ID 7 4 channel number 3 1 bus ID 0 based 0 bus type 0 public IPMB 1 private bus This byte can take one of the following three values depending on which bus will be used 0x0 I2C0 IPMB 0x3 I2C1 CPCI SMB 0xf I2C2 Local I2C 2 XXh Slave Address 0...

Page 59: ...B 1 11 Get Event Receiver This command gets the current setting for the Event Receiver slave address and LUN Table B 10 NetFn 0x04 Cmd 0x01 Byte Value Data Field Comments Request data 1 XXh Event Receiver Slave Address 0FFh disables Event message generation 7 1 IPMB I2 C slave address 0 0 2 XXh 7 2 reserved 1 0 Event receiver LUN Response data 1 00 Completion code Byte Value Data Field Comments Re...

Page 60: ...in the Sensor Data Records Byte Value Data Field Comments Request data 1 XXh Sensor Number FFh reserved Response data 1 00h Completion code 2 XXh Sensor reading 3 XXh 7 0b All event messages disabled for this sensor 6 0b sensor scanning disabled 5 1b Initial update in progress 4 0 reserved 4 XXh For threshold based sensors present threshold comparison status For discrete reading sensors State 0 7 ...

Page 61: ...ensor 0x44 says 0xC3 195 decimal the actual voltage is 195 256 3 3 2 5 027 V c For Temp sensors Ta Tr Where Ta actual temperature in o C Tr raw sensor reading e g if sensor 0x61 says 0x1f 31 decimal the actual temperature is 31o C B 1 13 FRU Inventory Area Info This command is used to obtain information about the size and access method of the FRU Inventory data in the device Table B 12 NetFn 0x0A ...

Page 62: ...ng of the FRU data is performed by the IPMI subsystem system management software is responsible for creating valid FRU data structures and writing the data to the FRU area Table B 14 NetFn 0x0A Cmd 0x12 Byte Value Data Field Comments Request data 1 XXh FRU device ID FFh reserved 2 XXh FRU Inventory offset to read LS Byte 3 XXh FRU Inventory offset to read MS Byte Offset is in words or bytes per de...

Page 63: ... Byte Value Data Field Comments Request data Response data 1 00h Completion code 2 51h SDR Version 3 XXh Record count LS Byte 4 XXh Record count MS Byte 5 6 XXXXh Free space in bytes LS Byte first 000h indicates full FFFEh indicates 64KB 2 or more FFFFh indicates unspecified 7 10 0000000 0h Most recent addition timestamp LS Byte first Add SDR or Partial Add SDR command not supported always returns...

Page 64: ... the repository FFFFh specifies that the last SDR in the repository should be listed If Record ID is non zero the command returns the information from the matching record and the Record ID for the next SDR in the repository Table B 17 NetFn 0x0A Cmd 0x23 Byte Value Data Field Comments Request data 1 XXh Reservation ID LS Byte Only required for partial reads with a non zero Offset into record field...

Page 65: ... 6D 62 65 64 64 65 64 Abaco 0020 20 53 79 73 74 65 6D 73 CC 56 4D 49 43 50 43 49 Systems CPCI 0030 2D 37 38 30 36 C5 31 30 30 30 31 CE 33 35 30 2D 7055 10001 350 0040 36 35 37 38 30 36 2D 32 31 30 C0 C1 00 00 00 B1 657055 000 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 00 00 00 0...

Page 66: ...ent of an Event Request Message For IPMB messages this field is equated to the Requestor s Slave Address and LUN fields Thus the Generator ID information is not carried in the data field of an IPMB request message Byte Value Data Field Comments Request data Generator ID RqSA RqLun 1 03h EvMRev IPMB v 1 0 message 2 XXh Sensor Type 02h voltage sensors 01h temperature sensors 3 XXh Sensor Sensor numb...

Page 67: ...l certain CompactPCI signals These functions are controlled by sending IPMI packets from the VMICPCI 7055 CPCI 7055RC processor cards to the controller B 4 1 Get Geographical Address This command returns the Slave Address based on the Geographical Slot the board is inserted into Table B 19 NetFn 0x30 Cmd 0x01 Byte Value Data Field Comments Request data Response data 1 XXh Completion code 2 XXh Geo...

Page 68: ...ave it sent back to the VMICPCI 7055 CPCI 7055RC If the request cannot be relayed due to a device not responding or the Zircon is temporarily out of memory the response to this command will use the NetFn and Cmd for IPMB Relay and a completion code only Table B 20 NetFn 0x32 Cmd 0x00 B 5 2 Forwarding of Platform Events A chassis may contain other IPMI devices such as an alarm card which will gener...

Page 69: ...ed Table B 21 NetFn 0x32 Cmd 0x80 If the forwarding address is 0 by default or deliberately set events will not be forwarded In all cases any Platform Events will be acknowledged back to the original sender The VMICPCI 7055 CPCI 7055RC should not acknowledge the forwarded event back to the IPMI controller Byte Value Data Field Comments Request data 1 XXh 7 1 I2 C slave address 0 always 0 2 XXh 7 2...

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