FM680 User Manual
r1.7
FM680
Page 5 of 32
3 General description
The FM680 is a high performance XMC, optionally conduction cooled, dedicated to digital
signal processing applications with high bandwidth and complex algorithms requirements. It
offers various interfaces, fast on-board memory resources, one Virtex-5 FPGA with
embedded PCI-express endpoint or Serial Rapid IO and one Virtex-6 device. It can be
utilized, for example, to accelerate frequency-domain algorithms with off-the-shelf Intellectual
Property cores for applications that require the highest level of performances. The FM680 is
mechanically and electrically compliant to the standard and specifications listed in section 1.2
of this document. A top level diagram is depicted in Figure 1.
Virtex-6
XC6VLX240T / XC6VLX550T
XC6VSX315T / XC6VSX475T
User I/O
clocks
Configuration circuit
and JTAG
Flash
512Mbit
LED
x4
LED
x4
Optional
battery for IP
encryption key
8
single ended
to
/from Pn
4
1
Pn4
Front Panel
180-pin QTH connector on side 1
and on side 2 (facing inward)
or 4 optical tranceivers @ 2.5 Gb/s
Optionally
conduction
cooled
Pn5
PCI Express
(VITA 42.3)
PCI express
end point
BLAST
SITE 1
BLAST
SITE 4
BLAST
SITE 5
1
BLAST
SITE 2
Pn6
Rocket IO
(VITA 42.2, 42.3)
BLAST
SITE 3
Virtex-5
PCI express
End point
4
x
2
.5
gbps
64
single ended
(LVTTL or lower
)
or
32
LVDS pairs
58
single ended
Local bus
8
x
2
.5
gbps
2
8
x up to
5
gbps
1
Only available on XC6VLX550T and SX475T FPGA devices
2
4 lanes go either to the V6 or to the V5
128 Mb
Serial flash
Figure 1: FM680 block diagram
Build on the success of its predecessor boards of the FM48x series the FM680 also uses the
BLAST technology. A total of 5 BLAST sites connect directly to the Virtex-6 FPGA.
