Aaeon SBC-357, Manual

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42 SBC-357 User Manual
Advanced chipset setup
Select the Advanced Chipset Setup from the AMIBIOS Setup
main menu to enter the Chipset Setup. The following configura-
tions are based on the manufacturer's default settings.
This section allows you to configure the system based on the
specific features of the installed chipset. This chipset manages
bus speeds and access to system memory resources, such as
DRAM and the external cache. It also coordinates communica-
tions between the conventional ISA bus and the PCI bus. It must
be stated that these items should never need to be altered. The
default settings have been chosen, because they provide the best
operating conditions for your system.
AMIBIOS SETUP — ADVANCED CHIPSET SETUP
(C) 1995 American Megatrends, Inc. All Rights Reserved
AT Bus Clock :14. 318/2
DRAM Refresh Type :RAS only
DRAM Self-Refresh :Disable
Slow Refresh :15 us
RAS Precharge time :2.5T
RAS Active Time Insert wait :Enabled
CAS Precharge Time Insert Wait :Enabled
Memory Write Insert Wait :Disabled PCLK 2/8
Memory Miss Read Insert Wait :Disabled PCLK 2/10
ISA I/O High Speed :Disabled PCLK 2/12
ISA Memory High Speed :Disabled
ISA Write cycle end Insert Wait :Enabled
Memory Hole at 15-16M :Disabled
I/O Recovery :Enabled
I/O Recovery Period :0.50 us
16Bit ISA Insert Wait :Enabled
Available Options:
14.318/2
PCLK 2/3
PCLK 2/4
PCLK 2/6
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ESC: Exit :Sel
PgUp/PgDn: Modify
F2/F3: Color
AMIBIOS SETUP — BIOS SETUP UTILITIES
(C) 1995 American Megatrends, Inc. All Rights Reserved
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Power Management Setup
Peripheral Setup
Change User Password
Change Supervisor Password
Change Language Setting
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Exit Without Saving
Standard CMOS setup for changing time, date, hard disk type, etc.
ESC: Exit :Sel F2/F3: Color F10: Save & Exit
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