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Raptor MicroATX – Installation Guide

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mini-ATA connector. Then connect remaining ends of the ribbon cable
to the appropriate peripherals. This concludes the hardware installation
of your Raptor MicroATX system. Now it is a good time to re-check all
of the cable connections to make sure they are correct.

The connector hole layouts on the Raptor MicroATX I/O Gasket
(included) are designed according to Intel ATX specifications.

Figure 1-2 MicroATX I/O Gasket

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Summary of Contents for MAX-Q670A

Page 1: ...Raptor MicroATX Motherboard Installation Guide ...

Page 2: ......

Page 3: ... 485 Termination Resistor Option Optional Feature 7 ATA Disk Connector Voltage Selection 8 LCD Panel Voltage Selection 8 On Board Chipset I2C Connection to EDID EEPROM 8 Step 2 SDRAM CPU and Cables Installation 9 Raptor MicroATX Memory Configuration 9 CPU Installation 9 Installing Cables 11 Power and Control Panel Cables 11 Installing Peripheral Cables 11 Index of Connectors 14 Chapter 2 Embedded ...

Page 4: ... Microprocessor 27 Appendix A Technical Specifications 29 Chipsets 29 System Memory 29 Bios 30 Embedded I O 30 Industrial Devices 31 Miscellaneous 32 Memory Map 33 DMA Channels 33 I O Map 34 PCI Configuration Space Map 35 Interrupts 35 PCI Interrupt Routing Map 36 SMBUS 37 Connectors Pin out 37 Appendix B Flash BIOS programming and codes 45 Troubleshooting POST 46 Critical Error BEEP Codes 52 Appe...

Page 5: ...Introduction III On board Ethernet 55 Serial Ports 55 Appendix D On Board Video Controller 63 ...

Page 6: ...lication This publication and any accompanying software may not in whole or in part be copied photocopied translated or reduced to any machine readable form without prior consent from the vendor manufacturer or creators of this publication except for copies kept by the user for backup purposes Brand and product names mentioned in this publication may or may not be copyrights and or registered trad...

Page 7: ...ser installer However as with any major computer component installation previous experience is helpful and should you not have prior experience it would be prudent to have someone assist you in the installation This manual is broken down into 3 chapters and 4 appendixes Chapter 1 System Board Pre Configuration This chapter provides all the necessary information for installing the Raptor MicroATX T...

Page 8: ...as been designed as rugged as possible but can still be damaged if jarred sharply or struck Handle the motherboard with care The Raptor MicroATX also contains delicate electronic circuits that can be damaged or weakened by static electricity Before removing the Raptor MicroATX from its protective packaging it is strongly recommended that you use a grounding wrist strap The grounding strap will saf...

Page 9: ...Hz PSB and FC PGA2 0 13u 100MHz PSB and Pentium III FC PGA 100MHz PSB FC PGA 133 PSB and FC PGA2 0 13u 133MHz PSB PGA370 processors Supported Bus Clocks 66MHz 100MHz and 133MHz Memory Two DIMM sockets up to 512MB unbuffered SDRAM PC100 and PC133 recommended for higher performance when using 133MHz PSB processors On Board I O 2 Floppies up to 2 88 MB Dual channel PCI 32 bit EIDE controller UDMA 66 ...

Page 10: ...tomatic CPU voltage temperature monitoring device optional ROM BIOS General Software Embedded 2000 BIOS with optional FLASH ROM On Board Ethernet Two On board 10 100 Ethernet On Board CRT LCD Optional video controller Standard CRT video controller Intel 815E chipset DVO connector optional LCD support optional SmartASIC SP1015 Conventions Used in this Manual 8 Notes Such as a brief discussion of me...

Page 11: ...TX has been designed to be as rugged as possible but it can be damaged if dropped jarred sharply or struck Damage may also occur by using excessive force in performing certain installation procedures such as forcing the system board into the chassis or placing too much torque on a mounting screw Take special care when installing or removing the system memory DIMMs Never force a DIMM into a socket ...

Page 12: ...PROTECTIVE ANTISTATIC PACKAGING TAKE PROPER PRECAUTIONS Work on a conductive surface that is connected to the ground Before touching any electronic device ground yourself by touching an unpainted metal object or and highly recommended use a grounding strap ...

Page 13: ... information There are two different categories of jumpers on the Raptor MicroATX A Two pin jumpers are used for binary selections such as enable disable Instructions for this type of jumper are open for no shunt over the pins or closed when the shunt covers the pins B Three or four pin jumpers are used for multiple selections Instructions for these jumpers will indicate which two pins to cover Fo...

Page 14: ...Raptor MicroATX Installation Guide 4 Jumper Locations Use the diagram below and the tables on the following pages to locate and set the on board configuration jumpers Figure 1 1 Jumper Locations ...

Page 15: ...ements The Raptor MicroATX has a Power on mode selection The jumper JP1 selects the power on mode Table 1 2 POWER ON Mode Select Power on mode Power on immediately Power on upon PWR_SW signal Button press JP1 1 2 2 3 Manufacturer s Settings SER C and SER D RS 232 RS 422 485 Selection Optional Feature To Select SER C and SER D operation mode use JP9 For RS 232 mode set 1 2 for RS 422 485 mode set 3...

Page 16: ...8 1 2 2 3 Manufacturer s Settings SER D RS 422 485 Receiver Mode Optional Feature The Receiver of SER D has two operating modes when used as RS 422 485 The jumper JP10 either selects receiver always on 1 2 for RS 422 operation or receiver controlled by the RTS signal 2 3 For Half Duplex operation RS 485 the option controlled by RTS signal must be selected For more information please refer to Appen...

Page 17: ...ion SER C RS 422 485 Tx Termination Resistor On Off SW1 1 On Off Manufacturer s Settings Table 1 7 SER C RS 422 485 Rx Termination Resistor Selection SER C RS 422 485 Rx Termination Resistor On Off SW1 2 On Off Manufacturer s Settings Table 1 8 SER D RS 422 485 Tx Termination Resistor Selection SER D RS 422 485 Tx Termination Resistor On Off SW1 3 On Off Manufacturer s Settings Table 1 9 SER D RS ...

Page 18: ...n The LCD panel connector J40 can provide either 5Vcc or 3 3Vcc to the LCD panel The jumper JP17 selects the voltage Table 1 11 LCD Panel Connector Voltage Select LCD Panel Voltage 5Vcc 3 3Vcc JP17 1 2 2 3 Manufacturer s Settings On Board Chipset I2C Connection to EDID EEPROM The On Board EEPROM that contains EDID information of LCD Panels may be Enabled or Disabled The jumper JP16 selects the opt...

Page 19: ...DIMMs is good Unreliable operation of the system may result if poor quality DIMMs are used Always purchase your memory from a reliable source We strongly recommend using PC133 memory module for higher performance when using 133MHz PSB processors CPU Installation The Raptor MICROATX currently supports the following CPUs Full series of Intel Celeron FC PGA 66MHz PSB FC PGA 100MHz PSB and FC PGA2 0 1...

Page 20: ...range within which the electrical circuits can be expected to meet their specified performance requirements Operation outside the functional limit can degrade system performance cause logic errors or cause component and or system damage Temperatures exceeding the maximum operating limits may result in irreversible changes in the operating characteristics of the component If the Raptor MicroATX ind...

Page 21: ...Cables Power and Control Panel Cables The Raptor MicroATX gets power from the power connector J1 Figure 1 3 Installing Peripheral Cables Now it is a good time to install the internal peripherals such as floppy and hard disk drives Do not connect the power cable to these peripherals as it is easier to attach the bulky ribbon cables before the smaller power connectors If you are installing more than...

Page 22: ...eripherals This concludes the hardware installation of your Raptor MicroATX system Now it is a good time to re check all of the cable connections to make sure they are correct The connector hole layouts on the Raptor MicroATX I O Gasket included are designed according to Intel ATX specifications Figure 1 2 MicroATX I O Gasket ...

Page 23: ...Chapter 1 Pre Configuration 13 Figure 1 3 Location of Components and Connectors ...

Page 24: ... Power Switch J9 Speaker J10 SMBUS Header J11 Keyboard Mouse Header J12 Bottom Keyboard PS 2 Top Mouse PS 2 J14 GPIO Header J15 Infra Red J16 FDD J17 Bottom USB 2x Top Ethernet 2 Device 245Dh Optional J19 VGA DB15 J20 PCI Connector 3 J21 PCI Connector 1 J22 PCI Connector 2 J23 PCI Connector 4 J29 Ethernet 1 Device 2459h RJ45 J30 Ethernet 1 Device 2459h Header J32 LPT Parallel J33 SER A J34 SER B J...

Page 25: ...Chapter 1 Pre Configuration 15 J39 DVO Connector J40 LCD Connector Optional J41 Alt Secondary IDE User s Notes ...

Page 26: ...l components During this time Power On Self Test POST progress codes are written by the system BIOS to I O port 80h allowing the user to monitor the progress with a special monitor Appendix B lists the POST codes and their meanings During early POST no video is available to display error messages should a critical error be encountered therefore POST uses beeps on the speaker to indicate the failur...

Page 27: ... options may not be available in your BIOS The windows are Basic CMOS Configuration Features Configuration Custom Configuration Shadow Configuration Reset CMOS to Last Known Values Reset CMOS to Factory Defaults Write to CMOS and Exit Exit Without Saving CMOS Basic CMOS Configuration Setup Screen The drive types boot activities and POST optimizations are configured from the Basic Setup Screen Figu...

Page 28: ...che coherency with such a mapping in place Figure 2 1 The Embedded BIOS Basic Setup Screen is used to configure drives boot actions and POST Configuring Drive Assignments Embedded BIOS allows the user to map a different file system to each drive letter The BIOS allows file systems for each floppy Floppy0 and Floppy1 and each IDE drive Ide0 Ide1 Ide2 and Ide3 Figure 2 1 shows how the first floppy d...

Page 29: ...th the numeric keypad and the keyboard Seek at Boot Set this option to the device that will perform a Seek operation at system boot The settings are Floppy default IDE Both and None Typematic Rate The settings are 30 cps default 24 20 15 12 10 8 and 6 Typematic Delay The settings are 250 ms default 500 ms 750 ms 1000 ms and disabled Config Box Set this option to show the configuration box during b...

Page 30: ...m appearing on the first BIOS screen when the computer boots The setting is either Disabled or Enabled The default setting is Enabled F1 Error Wait If this option is set to Enabled the BIOS waits for the user to press F1 before continuing If this option is set to Disabled the BIOS continues the boot process without waiting for F1 to be pressed Configuring Floppy Drive Types Choose either Floppy Dr...

Page 31: ...each POST No translation on the drive s geometry is performed so this type is limited to drives of 512MB or less Commonly this is used with embedded ATA PC Cards The LBA type instructs the BIOS to query the drive s geometry from the controller on each POST but then translate the geometry according to the industry standard LBA convention This supports up to 128GB drives Use this method for all new ...

Page 32: ...ity in the sequence Reboot Reboot the board Debugger MFGMODE DOS in ROM Alarm Maintenance RAS Power Off CLI Options not available Features Configuration Setup Screen Advanced Power Management Set this option to Enabled the power management and APM Advanced Power Management features The settings for this option are Disabled default and Enabled Note that the CICH has limited APM support Graphical Au...

Page 33: ...er This option is not available Parallel Port This option enables default or disables the Parallel Port Parallel Port IRQ This option specifies the IRQ always used by the parallel port The settings are IRQ 5 and IRQ 7 default Parallel Port Address This option specifies the base I O port address of the parallel port on the motherboard The settings are 378h default 278h and 3BCh Parallel Port Mode T...

Page 34: ...15 SER B This option enables default or disables the Serial Port B SER B Address This option specifies the base I O port address of the Serial port B on the motherboard The settings are 3F8h 2F8h default 3E8h 2E8h 338h 220h 228h and 238 SER B IRQ This option specifies the IRQ of the Serial port A on the motherboard The settings are 4 3 default 5 7 12 14 and 15 SER C This option enables default or ...

Page 35: ...E8h 2E8h default 338h 220h 228h and 238 SER D IRQ This option specifies the IRQ of the Serial port D on the motherboard The settings are 4 3 5 7 default 12 14 and 15 Shadow Configuration Setup Screen The Shadow Configuration Setup Screen Figure 2 2 allows the selective enabling and disabling of shadowing in 16KB sections except for the top 64KB of the BIOS ROM which is shadowed as a unit Normally ...

Page 36: ...own values Reset CMOS to Factory Defaults The Fail Safe CMOS factory Setup option settings can be loaded by selecting the Reset CMOS to Factory Defaults Use this option as a diagnostic aid if the system is behaving erratically Write to CMOS and Exit Exit BIOS saving the changes Exit without Changing CMOS This option allows exiting the BIOS setup without saving any change to the CMOS ...

Page 37: ...We strongly recommend using PC133 memory module for higher performance when using 133MHz PSB processors but PC100 memory modules may be used PC66 memory modules cannot be used even if a Celeron 66MHz PSB processor is being used Upgrading the Microprocessor The latest revision of the Raptor MicroATX currently supports full series of Intel Celeron FC PGA 66MHz PSB FC PGA 100MHz PSB and FC PGA2 0 13u...

Page 38: ...Raptor MicroATX Installation Guide 28 User s Notes ...

Page 39: ... PSB FC PGA 100MHz PSB and FC PGA2 0 13u 100MHz PSB and Pentium III FC PGA 100MHz PSB FC PGA 133 PSB and FC PGA2 0 13u 133MHz PSB PGA370 processors System Memory Memory Capacity Up to 512MB unbuffered SDRAM DIMM Modules Memory Type Two sockets for JEDEC standard 168 pins DIMMs The memory configuration is set automatically through BIOS via SPD Supports SDRAM 3 3V SDRAM PC100 and PC133 memory module...

Page 40: ...l PCI 32 bit EIDE controller UDMA 66 100 supported One extra connector mini Header 44 pin in parallel to IDE1 for Solid State IDE disk or any 44 pin IDE device support Serial Ports Four high speed RS 232 or two RS 232 and two RS 422 485 optional serial ports 16 Bytes FIFO 16550 16550D Factory optional feature RS 422 485 Full duplex or Half duplex RTS flow control termination resistors on off trans...

Page 41: ...ces Two Universal Serial Bus connectors On board Ethernet Two RJ45 Ethernet connectors Industrial Devices Temperature and Voltage Device Automatic CPU voltage temperature monitoring device optional Power Management Power button function advanced power management support I2C SMBUS SMBus I2C header General Purpose I O lines Four general purpose I O lines in a header ...

Page 42: ...DE CPU Socket Standard ZIF Zero Insertion Force PGA 370 Form Factor MicroATX form factor 8 x 9 6 PCB Construction Six Layers dry film mask Manufacturing Process Automated surface mount Table A 1 Environmental Environmental Operating Non operating Temperature 0 to 55 C 40 to 65 C Humidity 5 to 95 40 C non condensing 5 to 95 40 C non condensing Shock 2 5G 10ms 10G 10ms Vibration 0 25 5 100Hz 5 5 100...

Page 43: ...0K 768K 0A0000 0BFFFF 128 KB Standard PCI ISA Video Memory 633K 640K 09E400 09FFFF 7KB BIOS Reserved 512K 633K 080000 09E3FF 121 KB Ext Conventional memory 0K 512K 000000 07FFFF 512 KB Conventional memory DMA Channels DMA Data Width System Resource 0 8 or 16 bits 1 8 or 16 bits Parallel port for ECP if selected 2 8 or 16 bits Floppy Drive 3 8 or 16 bits Parallel port for ECP if selected 4 Reserved...

Page 44: ...lso located at 0080h 0092 Port 92 00A0 00A1 Interrupt Controller 2 00B2 00B3 APM control 00C0 00DE DMA 2 00F0 Coprocessor Error 0170 _ 0177 Secondary IDE channel 01F0 _ 01F7 Primary IDE channel 0278 027F LPT2 if selected 02E8 02EF COM4 default 02F8 02FF COM2 default 0310 Watch Dog Timer if selected 0376 Secondary IDE channel command port 0377 Floppy channel 2 command 0377 bit 7 Floppy disk change ...

Page 45: ...4 bytes PCI configuration data register PCI Configuration Space Map Bus Device Function Description 00 00 00 815E Host Bridge 00 02 00 815E VGA Controller 00 1E 00 Hub Interface to PCI Bridge 00 1F 00 C ICH LPC Bridge 00 1F 01 C ICH Master IDE Controller 00 1F 02 C ICH USB 00 1F 03 C ICH SMBus Controller 01 08 00 LAN0 Controller Ethernet 2459h 01 09 00 LAN1 Controller Ethernet 245Dh 01 0F 00 PCI e...

Page 46: ...12 PS 2 mouse port 13 Reserved math coprocessor 14 Primary IDE 15 Secondary IDE Default but can be changed to another IRQ PCI Interrupt Routing Map C ICH Signal ID SEL PIRQ A PIRQ B PIRQ C PIRQ D PIRQ E PIRQ F PCI Slot 1 AD31 INTB INTC INTD INTA PCI Slot 2 AD30 INTC INTD INTA INTB PCI Slot 3 AD29 INTD INTA INTB INTC PCI Slot 4 AD28 INTA INTB INTC INTD Ethernet 2459h INTE Ethernet 245Dh INTF USB IN...

Page 47: ...first row is numbered in sequence be aware that male and female connectors are mirrored male connectors are numbered from left to right when viewed from front and female connectors are numbered from right to left when viewed from front The following rows resume the counting on the same side of pin number 1 The counting is NOT circular like Integrated Circuits legacy from electronic tubes Header co...

Page 48: ...RX 3 TX 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI Table A 10 Serial Port SER B Header Connector Pin Serial Port Header J34 1 DCD 2 DSR 3 RX 4 RTS 5 TX 6 CTS 7 DTR 8 RI 9 GND 10 Key Table A 11 J5 Power LED Keylock Header Connector Pin out Pin PWR LED KBD Lock Header J5 1 Power LED Anode 2 NC 3 Cathode 4 KEYLOCK 5 Cathode ...

Page 49: ...422 485RXA opt 2 DSR 3 RX RS 422 485TXB opt 4 RTS 5 TX RS 422 485TXA opt 6 CTS 7 DTR 8 RI RS 422 485RXB opt 9 GND 10 Key Table A 13 Serial Port SER D Header Connector Pin Serial Port Header J38 1 DCD RS 422 485RXA opt 2 DSR 3 RX RS 422 485TXB opt 4 RTS 5 TX RS 422 485TXA opt 6 CTS 7 DTR 8 RI RS 422 485RXB opt 9 GND 10 Key ...

Page 50: ...5 Shorted to 4 6 RX 7 Shorted to 8 8 Shorted to 7 Table A 15 J17 USB Ethernet 2 optional Device 245D Connector Pin USB Connector J17A 1 5V USB1 2 D USB1 3 D USB1 4 GROUND USB1 5 5V USB2 6 D USB2 7 D USB2 8 GROUND USB2 Pin Ethernet 2 optional Connector J17B 1 TX 2 TX 3 RX 4 Shorted to 5 5 Shorted to 4 6 RX 7 Shorted to 8 8 Shorted to 7 ...

Page 51: ... BIT 4 7 DATA BIT 5 8 DATA BIT 6 9 DATA BIT 7 10 ACK1 11 BUSY 12 PAPER EMPTY 13 SLCT 14 AUTOFEED 15 ERROR 16 INIT 17 SLCT IN 18 25 GND Table A 17 J30 Ethernet 1 Device 2459h Header Connector Pin Ethernet Header J30 1 Connected to pin 4 5 of RJ45 2 Connected to pin 7 8 of RJ45 3 RX 4 RX 5 Speed LED Cathode 6 Speed LED Anode 7 ACT LED Cathode 8 ACT LED Anode 9 TX 10 TX ...

Page 52: ... LED J6 1 Anode 2 Cathode CPU FAN J3 1 Sense 2 12V 3 GND SYS FAN J2 1 Sense 2 12V 3 GND Speaker J9 1 5V 2 NC 3 NC 4 Signal GPIO J14 1 GP21 2 GP23 3 GND 4 GP34 5 GP35 SMBus I2C J10 1 SMCLOCK 2 KEY 3 GND 4 SMDATA 5 5V Table A 19 J11 Keyboard Mouse Header Connector Pin Keyboard Mouse Header J11 1 Mouse CLK 2 Keyboard CLK 3 HDD LED 4 Keyboard Data 5 VCC 6 VCC 7 GND 8 Mouse Data 9 GND 10 Key ...

Page 53: ...0 RO0 7 GND 41 RO1 8 VSYNC 42 RO2 9 GND 43 RO3 10 RE0 44 GND 11 RE1 45 RO4 12 RE2 46 RO5 13 RE3 47 RO6 14 GND 48 RO7 15 RE4 49 GND 16 RE5 50 GO0 17 RE6 51 GO1 18 RE7 52 GO2 19 GND 53 GO3 20 GE0 54 GND 21 GE1 55 GO4 22 GE2 56 GO5 23 GE3 57 GO6 24 GND 58 GO7 25 GE4 59 GND 26 GE5 60 BO0 27 GE6 61 BO1 28 GE7 62 BO2 29 GND 63 BO3 30 BE0 64 GND 31 BE1 65 BO4 32 BE2 66 BO5 33 BE3 67 BO6 34 GND 68 BO7 ...

Page 54: ...Raptor MicroATX Installation Guide 44 User s Notes ...

Page 55: ...lash utility Reflash is a simple utility that loads a valid Embedded BIOS image and uses the media driver from the BIOS within that image to reflash the BIOS Be aware that this operation MUST NOT BE INTERUPTED A power outage may be fatal No recovery method is provided since Embedded BIOS does not support a boot block recovery structure at this time Running Reflash from the command line Boot from M...

Page 56: ...on delay finished POST_STATUS_ KBDBATRDY 04h Keyboard BAT finished POST_STATUS_ DISABSHADOW 05h Disable shadowing cache POST_STATUS_ CALCCKSUM 06h Compute ROM CRC wait for KBC POST_STATUS_ CKSUMGOOD 07h CRC okay KBC ready POST_STATUS_BATVRFY 08h Verifying BAT command to KB POST_STATUS_KBDCMD 09h Start KBC command POST_STATUS_KBDDATA 0ah Start KBC data POST_STATUS_ BLKUNBLK 0bh Start pin 23 24 bloc...

Page 57: ...base 64KB memory POST_STATUS_TESTDATA 1ch Test data lines POST_STATUS_TESTADDR 20h Test address lines POST_STATUS_ TESTPARITY 21h Test parity toggling POST_STATUS_ TESTMEMRDWR 22h Test Base 64KB memory POST_STATUS_SYSINIT 23h Prepare system for IVT initialization POST_STATUS_ INITVECTORS 24h Initialize vector table POST_STATUS_ 8042TURBO 25h Read 8042 for turbo switch setting POST_STATUS_ POSTTURB...

Page 58: ...display mode POST_STATUS_ CHECKSEG40A 35h Initialize ROM BIOS data area POST_STATUS_ SETCURSOR 36h Set cursor for power on msg POST_STATUS_ PWRONDISPLAY 37h Display power on message POST_STATUS_ SAVECURSOR 38h Save cursor position POST_STATUS_BIOSIDENT 39h Display BIOS identification string POST_STATUS_HITDEL 3ah Display Hit DEL to message POST_STATUS_VIRTUAL 40h Prepare protected mode test POST_S...

Page 59: ...1st 64KB memtest POST_STATUS_ COLDLOWTEST 4fh Cold boot Test all of low memory POST_STATUS_ ADJUSTLOW 50h Adjust memory size for EBDA usage POST_STATUS_ COLDHITEST 51h Cold boot Test high memory POST_STATUS_ REALMODETEST 52h Prepare for shutdown to real mode POST_STATUS_ ENTERREAL 53h Return to real mode POST_STATUS_ SHUTDOWN 54h Shutdown successful POST_STATUS_DISABA20 55h Disable A20 line POST_S...

Page 60: ...STATUS_ CHECKLOCKEDKEYS 83h Check for locked keys POST_STATUS_ MEMSIZEMISMATCH 84h Check for memory size mismatch POST_STATUS_ PASSWORD 85h Check for password or bypass setup POST_STATUS_ BEFORESETUP 86h Password accepted POST_STATUS_ CALLSETUP 87h Entering setup system POST_STATUS_ POSTSETUP 88h Setup system exited POST_STATUS_ DISPPWRON 89h Display power on screen message POST_STATUS_DISPWAIT 8a...

Page 61: ...ST_STATUS_ SERIALBASE 9ah Configure serial port base addresses POST_STATUS_ INITBEFORENPX 9bh Prepare to initialize coprocessor POST_STATUS_INITNPX 9ch Initialize numeric coprocessor POST_STATUS_POSTNPX 9dh Numeric coprocessor initialized POST_STATUS_ CHECKLOCKS 9eh Check KB settings POST_STATUS_ ISSUEKBDID 9fh Issue keyboard ID command POST_STATUS_RESETID 0a0h KB ID flag reset POST_STATUS_ TESTCA...

Page 62: ... encountered at these early stages POST uses beep codes a sequence of tones on the speaker to identify the source of the error The following is a comprehensive list of POST beep codes for the system BIOS BIOS extensions such as VGA ROMs and SCSI adapter ROMs may use their own beep codes including short long sequences or possibly beep codes that sound like the ones below When diagnosing a system fa...

Page 63: ...gister test failed POST_BEEP_CACHE 11 External cache test failed POST_BEEP_BOARD 12 General board initialization failed POST_BEEP_LOWMEM 13 Exhaustive low memory test failed POST_BEEP_EXTMEM 14 Exhaustive extended memory test failed POST_BEEP_CMOS 15 CMOS restart byte test failed POST_BEEP_ADDRESS_LINE 16 Address line test failed POST_BEEP_DATA_LINE 17 Data line test failed POST_BEEP_INTERRUPT 18 ...

Page 64: ...Raptor MicroATX Installation Guide 54 User s Notes ...

Page 65: ... for bus accesses This enables the integrated LAN Controller to transmit data with minimum interframe spacing IFS The LAN Controller can operate in full duplex or half duplex mode In full duplex mode the LAN Controller adheres to the IEEE 802 3x Flow Control specification Half duplex performance is enhanced by a proprietary collision reduction mechanism The RJ45 Ethernet Connector pin out of Ether...

Page 66: ...n out Table A 10 SER B Header Connector pin out Table A 12 SER C Header Connector pin out Table A 13 SER D Header Connector pin out TIA EIA 232 RS is the abbreviation for recommended standard Usually it is based on or is identical to other standards e g EIA TIA 232 F TIA EIA 232 previously known as RS 232 was developed in the 1960 s to interconnect layers of the interface ITU T V 11 but also the p...

Page 67: ...n operating in RS 232 mode Protocol Different from other purely electrical layer standards TIA EIA 232 defines not only the physical layer of the interface ITU T V 11 but also the pinout of the appropriate connectors 25 pin D type or 9 pin DB9S ISO 2210 and the protocol ITU T V 24 The interface standard specifies also handshake and control lines in addition to the 2 unidirectional receive data lin...

Page 68: ... than 1 meter TIA EIA 422 TIA EIA 422 RS 422 allows a multi drop interconnection of one driver transmitting unidirectionally to up to 10 receivers Although it is not capable of bidirectional transfer it is still applicable and used for talker audience scenarios Electrical TIA EIA 422 ITU T V 11 is comparable to TIA EIA 485 It is limited to unidirectional data traffic and is terminated only at the ...

Page 69: ...o address malfunctions in combination with ground shifts RS 422 is terminated only at the line end opposite to the driver even if there is only one receiver Protocol Not applicable none specified The Raptor MicroATX requires transmitter enabled by the RTS signal RS 422 is Differential and may be either Point to Point or Multi Drop Connected Differential Point to Point Differential Multi Drop ...

Page 70: ...eturn line the emissions cancel each other This is true in any case for crosstalk from and to neighboring signal lines It is also true for noise from other sources as long as the common mode voltage does not go beyond the common mode range of the receiver Since ground noise is also common to both signals the receiver rejects this noise as well The twisted pair cable used in these interfaces in com...

Page 71: ...s a half duplex differential transmission on cable lengths of up to 1200 m and at data rates of typically up to 35 Mbps requirement similar to TIA EIA 422 but tr 30 of the bit duration there are also faster devices available suited for higher rates under certain load conditions The standard allows a maximum of 32 unit loads of 12 kΩ equal to 32 standard nodes or even higher count with increased in...

Page 72: ... shown up to this point do not have incorporated signal return paths to ground Obviously having a solid ground connection so that both receivers and drivers can talk error free is imperative The figure below shows how to make this connection and recommends adding some resistance between logic and chassis ground to avoid excess ground loop currents Logic ground does not have any resistance in its p...

Page 73: ...otropic Mip Map filtering Gouraud shading alpha blending fogging and Z buffering A rich set of 3D instructions permit these features to be independently enabled or disabled For the GMCH a Display Cache DC can be used for the Z buffer textures and display buffer s are located only in system memory If the display cache is not used the Z buffer is located in system memory The GMCH integrated graphics...

Page 74: ...ide the R G and B signals to the monitor Sync signals are properly delayed to match any delays from the D to A conversion Associated with each DAC is a 256 pallet of colors The RAMDAC can be operated in either direct or indexed color mode In Direct color mode pixel depths of 15 16 or 24 bits can be realized Non interlaced mode is supported Gamma correction can be applied to the display output The ...

Page 75: ...transmission devices The GMCH supports a variety of Flat Panel display modes and refresh rates that require up to a 65 MHz dot clock over this interface Table D 2 shows some of the display modes supported by the GMCH The GMCH supports scaling for all of the resolutions listed in Table D 2 Actual scaling results are dependant on the third party flat panel transmitter If the flat panel transmitter d...

Page 76: ...ge scaling Multiple TFT LCD Panel Support Programmable output timing parameters to match specifications of various TFT LCD panels Single or dual pixel output 24 48 bit RGB Image Scaling The SP1015 support several input modes and the input image may have different sizes It is essential to support automatic image scaling so that the input image is always displayed at full screen regardless of the in...

Page 77: ...n true colors for a 6 bit panel Two dithering algorithms are implemented and users can choose between them The first one is area based dithering and the second one is frame based frame modulation which is also called frame rate control Text Enhancement In order to generate a good picture the SP1015 incorporate a proprietary scheme to detect text and non text picture Then the appropriate process is...

Page 78: ...o BIOS in the Raptor MicroATX are ready to deal with some modules EDID and EDID less operation are available The use of the DVO port and the on board SP 1015 depends on many parameters set in the video BIOS and in on board EEPROMs Therefore the use of these devices will depend on custom solutions provided by the manufacturer of the Raptor MicroATX The 82815 is a single video engine pipeline device...

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