G r e e n E m b e d d e d S y s t e m
G E S - 5 5 0 0 F
Appendix A Programming the Watchdog Timer
A-4
WatchDog Timer Configuration Registers
LDN
Index
R/W
Reset
Configuration register or Action
All
02h
W
N/A
Configure Control
07h
71h
R/W
00h
Watch Dog Timer Control Register
07h
72h
R/W
001s0000b
Watch Dog Timer Configuration
Register
07h
73h
R/W
38h
Watch Dog Timer Time-out Value
(LSB) Register
07h
74h
R/W
00h
Watch Dog Timer Time-out Value
(MSB) Register
Configure Control (Index=02h)
This register is write only. Its values are not sticky; that is to say, a
hardware reset will automatically clear the bits, and does not
require the software to clear them.
Bit Description
7-2
Reserved
1
Returns to the “Wait for Key” state. This bit is used when the
configuration sequence is completed.
0
Resets all logical devices and restores configuration registers
to their power-on states.
Watch Dog Timer 1, 2, 3 Control Register (Index=71h,81h,91h
Default=00h)
Bit Description
7
WDT Timeout Enable (WTE)
1: Disable.
0: Enable.
6
WDT Reset upon Mouse Interrupt (WRKMI)
1: Disable.
0: Enable.
5
WDT Reset upon Keyboard Interrupt (WRKBI)
1: Disable.
