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S u b C o m p a c t B o a r d
G E N E - A 5 5 E
Appendix A Programming the Watchdog Timer
A-2
A.1 Programming
GENE-A55E utilizes FINTEK 81866 chipset as its watchdog timer
controller. Below are the procedures to complete its configuration
and the AAEON initial watchdog timer program is also
attached based on which you can develop customized
program to fit your application.
Configuring Sequence Description
After the hardware reset or power-on reset, the FINTEK 81866
enters the normal mode with all logical devices disabled
except KBC. The initial state (enable bit ) of this logical device
(KBC) is determined by the state of pin 121 (DTR1#) at the falling
edge of the system reset during power-on reset.
Summary of Contents for GENE-A55E
Page 59: ...SubCompact Board G E N E A 5 5 E Chapter 3 AMI BIOS Setup 3 1 AMI BIOS Setup Chapter 3...
Page 105: ...SubCompact Board G E N E A 5 5 E Appendix B I O Information B 1 I O Information Appendix B...
Page 106: ...SubCompact Board G E N E A 5 5 E Appendix B I O Information B 2 B 1 I O Address Map...
Page 107: ...SubCompact Board G E N E A 5 5 E Appendix B I O Information B 3...
Page 108: ...SubCompact Board G E N E A 5 5 E Appendix B I O Information B 4 B 2 1 st MB Memory Address Map...
Page 110: ...SubCompact Board G E N E A 5 5 E Appendix C Mating Connector C 1 Mating Connector Appendix C...
Page 113: ...SubCompact Board G E N E A 5 5 E Appendix D AHCI Settings D 1 AHCI Settings Appendix D...