F u l l - s i z e C P U C a r d
F S B - 8 6 8 G R e v . B
Appendix A Programming the Watchdog Timer
A-4
= 01 Power LED pin is drived low.
= 10 Power LED pin is a 1Hz toggle pulse
with 50 duty cycle.
= 11 Power LED pin is a 1/4Hz toggle pulse
with 50 duty cycle.
Bit
5-4
: Reserved
Bit
3
: select WDTO count mode.
= 0
second
=
1
minute
Bit
2
: Enable the rising edge of keyboard Reset
(P20) to force Time-out event.
= 0 Disable
= 1 Enable
Bit
1-0
: Reserved
WatchDog Timer Register II (Index=F6h, Default=00h)
Bit
7-0
= 0 x 00 Time-out Disable
= 0 x 01 Time-out occurs after 1
second/minute
= 0 x 02 Time-out occurs after 2
second/minutes
= 0 x 03 Time-out occurs after 3
second/minutes
………………………………..
= 0 x FF Time-out occurs after 255
