E P I C B o a r d
E P I C - Q M 7 7
Appendix D Electrical Specifications for I/O Ports
D-7
************************************************************************************
//
Digital
Output
control
relative
definition
(Please
reference
to
Table
3)
#define
byte
DOutput1LDN
//
This
parameter
is
represented
from
Note27
#define
byte
DOutput1Reg
//
This
parameter
is
represented
from
Note28
#define
byte
DOutput1Bit
//
This
parameter
is
represented
from
Note29
#define
byte
DOutput1Val
//
This
parameter
is
represented
from
Note30
#define
byte
DOutput2LDN
//
This
parameter
is
represented
from
Note31
#define
byte
DOutput2Reg
//
This
parameter
is
represented
from
Note32
#define
byte
DOutput2Bit
//
This
parameter
is
represented
from
Note33
#define
byte
DOutput2Val
//
This
parameter
is
represented
from
Note34
#define
byte
DOutput3LDN
//
This
parameter
is
represented
from
Note35
#define
byte
DOutput3Reg
//
This
parameter
is
represented
from
Note36
#define
byte
DOutput3Bit
//
This
parameter
is
represented
from
Note37
#define
byte
DOutput3Val
//
This
parameter
is
represented
from
Note38
#define
byte
DOutput4LDN
//
This
parameter
is
represented
from
Note39
#define
byte
DOutput4Reg
//
This
parameter
is
represented
from
Note40
#define
byte
DOutput4Bit
//
This
parameter
is
represented
from
Note41
#define
byte
DOutput4Val
//
This
parameter
is
represented
from
Note42
#define
byte
DOutput5LDN
//
This
parameter
is
represented
from
Note43
#define
byte
DOutput5Reg
//
This
parameter
is
represented
from
Note44
#define
byte
DOutput5Bit
//
This
parameter
is
represented
from
Note45
#define
byte
DOutput5Val
//
This
parameter
is
represented
from
Note46
#define
byte
DOutput6LDN
//
This
parameter
is
represented
from
Note47
#define
byte
DOutput6Reg
//
This
parameter
is
represented
from
Note48
#define
byte
DOutput6Bit
//
This
parameter
is
represented
from
Note49
#define
byte
DOutput6Val
//
This
parameter
is
represented
from
Note50
#define
byte
DOutput7LDN
//
This
parameter
is
represented
from
Note51
#define
byte
DOutput7Reg
//
This
parameter
is
represented
from
Note52
#define
byte
DOutput7Bit
//
This
parameter
is
represented
from
Note53
#define
byte
DOutput7Val
//
This
parameter
is
represented
from
Note54
#define
byte
DOutput8LDN
//
This
parameter
is
represented
from
Note55
#define
byte
DOutput8Reg
//
This
parameter
is
represented
from
Note56
#define
byte
DOutput8Bit
//
This
parameter
is
represented
from
Note57
#define
byte
DOutput8Val
//
This
parameter
is
represented
from
Note58
************************************************************************************
Summary of Contents for EPIC-QM77
Page 9: ...EPIC Board E P I C Q M 7 7 Chapter 1 General Information 1 1 General Chapter 1 Information ...
Page 18: ...EPIC Board E P I C Q M 7 7 Chapter 2 Quick Installation Guide 2 4 Solder Side Solder Side ...
Page 20: ...EPIC Board E P I C Q M 7 7 Chapter 2 Quick Installation Guide 2 6 Solder Side Solder Side ...
Page 63: ...Industrial Motherboard E P I C Q M 7 7 Chapter 3 AMI BIOS Setup 3 1 AMI Chapter 3 BIOS Setup ...
Page 72: ...Industrial Motherboard E P I C Q M 7 7 IDE Configuration IDE Chapter 3 AMI BIOS Setup 3 10 ...
Page 73: ...Industrial Motherboard E P I C Q M 7 7 IDE Configuration AHCI Chapter 3 AMI BIOS Setup 3 11 ...
Page 89: ...Industrial Motherboard E P I C Q M 7 7 Setup submenu Chipset Chapter 3 AMI BIOS Setup 3 27 ...
Page 97: ...Industrial Motherboard E P I C Q M 7 7 Memory Information Chapter 3 AMI BIOS Setup 3 35 ...
Page 99: ...Industrial Motherboard E P I C Q M 7 7 BBS Priorities Chapter 3 AMI BIOS Setup 3 37 ...
Page 101: ...Industrial Motherboard E P I C Q M 7 7 Chapter 3 AMI BIOS Setup 3 39 Setup submenu Exit ...
Page 102: ...EPIC Board E P I C Q M 7 7 Chapter 4 Driver Installation 4 1 Driver Chapter 4 Installation ...
Page 113: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 1 I O Information Appendix B ...
Page 114: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 2 B 1 I O Address Map ...
Page 115: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 3 ...
Page 116: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 4 ...
Page 117: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 5 B 2 Memory Address Map ...
Page 118: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 6 B 3 IRQ Mapping Chart ...
Page 119: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 7 ...
Page 120: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 8 ...
Page 121: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 9 ...
Page 122: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 10 ...
Page 123: ...EPIC Board E P I C Q M 7 7 Appendix B I O Information B 11 B 4 DMA Channel Assignments ...
Page 124: ...EPIC Board E P I C Q M 7 7 Appendix C Mating Connector C 1 Mating Connector Appendix C ...