Aaeon BOXER-6914, Manual

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E m b e d d e d B o x P C
B O X E R - 6 9 1 4
C.1 DIO Programming
1. General Description
F75113 is a low power general purpose IO chip providing 40 GPIO.
Level or pulse mode can be programmed by registers so all GPIO
can be programmed to logic one, zero, high pulse or low pulse.
GPIO0X~GPIO2X can be programmed to be power LED. F75113
includes two sets of watchdog timer for system reset. Besides, two
power-down modes (Manual or Smart) can be selected to save
power and control the total consumption under 10uA, so F75113
can fit the requirement of mobile device such as PDA or cell phone.
2. Access Interface
The F75113 provides three auto-detected access interfaces, LPC,
SMBus or SPI, to read/write internal registers. In LPC interface, the
default address of Configuration Register I/O port is 2Eh. When
user writes data 10h to LPC configuration register 27h, the address
of Configuration Register I/O port will be 4Eh. In SMBus interface,
Serial Bus address default value is 6Eh (0110_1110). Another SPI
interface only care the least eight bits (LSB) of 24 bits address. SPI
interface write register by 02h instruction (Page Program) and read
register by 03h instruction (Read Data). Also SPI interface
supported byte write/read function.
Besides, the pin 46, 47, 48, 1, 2, 3, 4 are multi-function pins. If user
want to access internal register by LPC interface, the F75113 will
Appendix C Programming the Digital I/O
C-2