E m b e d d e d C o n t r o l l e r
A E C - 6 9 1 0
Appendix A Programming the Watchdog Timer
A-2
A.1 Programming
AEC-6910 utilizes the ITE 8712 chipset as its watchdog timer
controller. Below are the procedures to complete its configuration
and the AAEON initial watchdog timer program is also attached with
which you can develop a customized program to fit your application.
Configuring Sequence Description
After the hardware reset or power-on reset, the ITE 8712 enters the
normal mode with all logical devices disabled except KBC. The
initial state (enable bit) of this logical device (KBC) is determined by
the state of pin 121 (DTR1#) at the falling edge of the system reset
during power-on reset.
Summary of Contents for AEC-6910
Page 21: ...Embedded Controller A E C 6 9 1 0 Chapter 2 Hardware Installation 2 3 B 2 PCI slots version ...
Page 30: ...Embedded Controller A E C 6 9 1 0 Chapter 3 Award BIOS Setup 3 1 Chapter Award 3 BIOS Setup ...
Page 49: ...Embedded Controller A E C 6 9 1 0 Appendix B I O Information B 1 I O Information Appendix B ...
Page 50: ...Embedded Controller A E C 6 9 1 0 Appendix B I O Information B 2 B 1 I O Address Map ...
Page 51: ...Embedded Controller A E C 6 9 1 0 Appendix B I O Information B 3 B 2 Memory Address Map ...
