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E m b e d d e d C o n t r o l l e r
A E C - 6 8 7 7
CPU Configuration
Options Summary :
Disabled
Hyper-threading
Enabled Default
Enabled for Windows XP and Linux (OS optimized for Hyper-Threading
Technology) and Disabled for other OS (OS not optimized for
Hyper-Threading Technology).
When Disabled only one thread per enabled core is enabled.
Disabled Default
Intel
Virtualization
Technology
Enabled
When enabled, a VMM can utilize the additional hardware capabilities
provided by Vanderpool Technology
Chapter 3 AMI BIOS Setup
3-8
Summary of Contents for AEC-6877
Page 16: ...Embedded Controller A E C 6 8 7 7 Chapter 1 General Information 1 7 ...
Page 18: ...Embedded Controller A E C 6 8 7 7 Chapter 2 Hardware Installation 2 2 2 1 Dimension ...
Page 19: ...Embedded Controller A E C 6 8 7 7 Chapter 2 Hardware Installation 2 3 Front side Rear side ...
Page 26: ...Embedded Controller A E C 6 8 7 7 Chapter 3 AMI BIOS Setup 3 1 AMI Chapter 3 BIOS Setup ...
Page 29: ...Embedded Controller A E C 6 8 7 7 Setup Menu Setup submenu Main Chapter 3 AMI BIOS Setup 3 4 ...
Page 30: ...Embedded Controller A E C 6 8 7 7 Setup submenu Advanced Chapter 3 AMI BIOS Setup 3 5 ...
Page 37: ...Embedded Controller A E C 6 8 7 7 Intel TXT LT Configuration Chapter 3 AMI BIOS Setup 3 12 ...
Page 45: ...Embedded Controller A E C 6 8 7 7 H W Monitor Chapter 3 AMI BIOS Setup 3 20 ...
Page 46: ...Embedded Controller A E C 6 8 7 7 Setup submenu Chipset Chapter 3 AMI BIOS Setup 3 21 ...
Page 54: ...Embedded Controller A E C 6 8 7 7 Hard Drives BBS Priorities Chapter 3 AMI BIOS Setup 3 29 ...
Page 56: ...Embedded Controller A E C 6 8 7 7 Chapter 3 AMI BIOS Setup 3 31 Setup submenu Exit ...
Page 71: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 1 I O Information Appendix B ...
Page 72: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 2 B 1 I O Address Map ...
Page 73: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 3 ...
Page 74: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 4 B 2 Memory Address Map ...
Page 75: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 5 B 3 IRQ Mapping Chart ...
Page 76: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 6 ...
Page 77: ...Embedded Controller A E C 6 8 7 7 Appendix B I O Information B 7 B 4 DMA Channel Assignments ...