CLM920 TD3 LTE Module Hardware Usage Guide
Shanghai Yuge Information Technology co., LTD
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The following figure shows the STATUS reference circuit design:
Figure 3-19 STATUS Pin Reference Circuit
3.11 PCM digital voice interface
The CLM920 TD3 module provides a set of PCM audio interfaces supporting 8-bit
A-rate, U-rate and 16-bit linear short frame encoding formats with PCM_SYNC of 8kHZ and
PCM_CLK of 2048kHZ.
Table 3-18 PCM pin definition
Pin
Signal name
I/O
Description
Para
meter
Level value (V)
Rem
arks
Min
Typical Max
24
PCM_IN
DI
PCM data input
VIH
1.2
1.8
2
VIL
-0.3
0.6
25
PCM_OUT
DO
PCM data output
VOH 1.35 1.8
2
VOL
0
0.45
26
PCM_SYNC DO
PCM frame sync
signal
VOH 1.35 1.8
2
VOL
0
0.45
27
PCM_CLK
DO
PCM clock pulse
VOH 1.35 1.8
2
VOL
0
0.45
Table 3-19 PCM specific parameters
Characteristic
Description
Encoding format
Linear
Data bit
16bits
Master-slave mode
Master/slave mode
PCM clock
2048kHz
PCM frame synchronization
Short frame