YOKOGAWA DL716, Руководство пользователя

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15-1
15
IM 701830-01E
Specifications
15.1 Input Section
Item Specifications
Type Plug-in input
Number of slots 16 (Various types of modules can exist simultaneously)
Maximum record length Standard 1 MW × 4CH (200 kW × 16CH)
/M1 8 MW × 4CH (2 MW × 16CH)
/M2 32 MW × 4CH (8 MW × 16CH)
/M3 64 MW × 4CH (16 MW × 16CH)
15.2 Trigger Section
Item Specifications
Trigger mode Auto, Auto-level, normal
Trigger source CH1 to CH16, LOGIC1, LOGIC2, LINE, EXT (LOGIC1, LOGIC2, LINE and EXT are available
only on simple trigger)
Trigger hysteresis Select from ± 0.1 div/ ± 0.5 div/ ± 1 div of the trigger level
Trigger level setting range CH1 to CH16 : ± 4 div from screen center (0.1 div resolution)
External-trigger level TTL (0 to 5 V)
Trigger position Can be set in 1% resolution, taking the record length to be 100%
Trigger delay setting range 0 to 1 s (500 ns resolution)
Holdoff-time range 0 to 1 s (500 ns resolution)
Simple trigger Edge
Trigger slope Rise, Fall, Rise/Fall (with edge trigger)
Enhanced trigger A → B(n) : Trigger occurs nth time condition B becomes true after condition A becomes true.
Count : 1 to 255
Condition A : Enter, Exit
Condition B : Enter, Exit
A Delay B : Trigger occurs first time condition B becomes true after specified delay following
condition A true.
Delay
: 0 s to 1 s (500 ns resolution)
Condition A : Enter, Exit
Condition B : Enter, Exit
Edge on A : Trigger occurs on Edge OR condition if condition A is true.
OR : Trigger occurs on OR condition.
B>Time : Trigger occurs if condition B lasts longer than specified time.
Time : 200 ns to 1 s (100 ns resolution)
B<Time : Trigger occurs if condition B lasts less than specified time.
Time : 200 ns to 1 s (100 ns resolution)
B Time Out : Trigger occurs when condition B has held true for specified time.
Time : 200 ns to 1 s (100 ns resolution)
Window : Trigger occurs when Channel 1 trigger-source level enters or exits voltage range.
(User selects entry or exit trigger.)
OR trigger across multiple channels possible (Window OR)
Timer trigger : Date (yy/mm/dd) time (hh/mm); time interval (one to 24 hours)
• Conditions A and B are parallel pattern conditions that are set separately to High, Low, or “Don’t
care” for each channel (CH1 to CH16) and for EXT input.
• The OR condition can be independently set to Rise, Fall or “Don’t care” for each channel (CH1 to
CH16) and for EXT.
• For channels which have the logic input modules installed, set to High, Low or Don’t Care on each
bit.
• Channels which have the logic input module installed cannot set the condition B of A → B(n) and of
A Delay B; OR of Edge on A; Edge OR; B>Time; B<Time; and Window.
However, condition A of A
→ B(n), A Delay B, Edge on A can be set.
Chapter 15 Specifications