Yamaha UB99A, Руководство по обслуживанию

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UB99A/UB99B/UB99MK2
8
■
LSI PIN DESCRIPTION
（LSI 端子機能表）
• HD6413008VF25 (X4196A00) CPU (MAIN)
DM: IC4
PIN
NO.
NAME I/O FUNCTION
PIN
NO.
NAME I/O FUNCTION
1 Vcc - Analog power 3.3V 51 P2
6
/A
14
I/O
Port 2 / Address bus
2 CS
_____
7
/TMO
0
/TP
8
/PB
0
I/O
Chip select / / / Port B
52 P2
7
/A
15
I/O
3 CS
_____
6
/TMIO
1
/TP
9
/PB
1
I/O 53 P5
0
/A
16
I/O
Port 5 / Address bus
4 CS
_____
5
/TMO
2
/TP
10
/PB
2
I/O 54 P5
1
/A
17
I/O
5 CS
_____
4
/TMIO
3
/TP
11
/PB
3
I/O 55 P5
2
/A
18
I/O
6 TP
12
/PB
4
I/O
Pulse output / Port B
56 P5
3
/A
19
I/O
7 TP
13/
PB
5
I/O 57 Vss - Ground
8 TP
14
/PB
6
I/O 58 P6
0
/WAIT
_________
I/O
Port 6
9 TP
15
/PB
7
I/O 59 P6
1
/BREQ
__________
I/O
10 RESO
__________
O Reset 60 P6
2
/BACK
__________
I/O
11 Vss - Ground 61 P6
7
/
φ
I/O Port 6 / System clock output
12 T
X
D
0
/P9
0
I/O
Data transmission / Port 9
62 STBY
_________
I Stand-by mode signal
13 T
X
D
1
/P9
1
I/O 63 RES
_______
I Reset
14 R
X
D
0
/P9
2
I/O
Data reception / Port 9
64 NMI I Non-maskable interrupt
15 R
X
D
1
/P9
3
I/O 65 Vss - Ground
16 IRQ
______
4
/SCK
0
/P9
4
I/O
Interrupt request / Serial clock / Port 9
66 EXTAL I Clock
17 IRQ
______
5
/SCK
1
/P9
5
I/O 67 XTAL O Clock
18 D
0
/P4
0
I/O
Data bus / Port 4
68 Vcc - Power 3.3V
19 D
1
/P4
1
I/O 69 P6
3
/AS
_____
O
Port 6
20 D
2
/P4
2
I/O 70 P6
4
/RD
_____
O
21 D
3
/P4
3
I/O 71 P6
5
/HWR
_________
O
22 Vss - Ground 72 P6
6
/LWR
________
O
23 D
4
/P4
4
I/O
Data bus / Port 4
73 MD
0
I
Model control
24 D
5
/P4
5
I/O 74 MD
1
I
25 D
6
/P4
6
I/O 75 MD
2
I
26 P4
7
/D
7
I/O Port 4 / Data bus 76 AVcc - Power 3.3V for A/D
27 P3
0
/D
8
I/O
Port 3 / Data bus
77 V
REF
I Reference voltage for A/D
28 P3
1
/D
9
I/O 78 AN
0
/P7
0
I
Analog input / Port 7
29 P3
2
/D
10
I/O 79 AN
1
/P7
1
I
30 P3
3
/D
11
I/O 80 AN
2
/P7
2
I
31 P3
4
/D
12
I/O 81 AN
3
/P7
3
I
32 P3
5
/D
13
I/O 82 AN
4
/P7
4
I
33 P3
6
/D
14
I/O 83 AN
5
/P7
5
I
34 P3
7
/D
15
I/O 84 DA
0
/AN
6
/P7
6
I/O
D/A output / Analog input / Port 7
35 Vcc - Analog power 3.3V 85 DA
1
/AN
7
/P7
7
I/O
36 P1
0
/A
0
I/O
Port 1 / Address bus
86 AVss - Ground for A/D
37 P1
1
/A
1
I/O 87 IRQ
______
0
/P8
0
O Interrupt request / Port 8
38 P1
2
/A
2
I/O 88 CS
_____
3
/IRQ
______
1
/P8
1
I/O
Chip select / Interrupt request / Port 8
39 P1
3
/A
3
I/O 89 CS
_____
2
/IRQ
______
2
/P8
2
I/O
40 P1
4
/A
4
I/O 90 ADTRG
____________
/CS
_____
1
/IRQ
______
3
/P8
3
I/O A/D trigger / Chip select / Interrupt request / Port 8
41 P1
5
/A
5
I/O 91 CS
_____
0
/P8
4
I/O Chip select / Port 8
42 P1
6
/A
6
I/O 92 Vss - Ground
43 P1
7
/A
7
I/O 93 TCLKA/TP
0
/PA
0
I/O
Timer clock / Pulse output / Port A
44 Vss - Ground 94 TCLKB/TP
1
/PA
1
I/O
45 P2
0
/A
8
I/O
Port 2 / Address bus
95 TCLKC/TIOCA
0
/TP
2
/PA
2
I/O Timer clock / Output comparison / Pulse output / Port A
46 P2
1
/A
9
I/O 96 TCLKD/TIOCB
0
/TP
3
/PA
3
I/O Timer clock / Input capture / Pulse output / Port A
47 P2
2
/A
10
I/O 97 A
23
/TIOCA
1
/TP
4
/PA
4
I/O Address bus / Output comparison / Pulse output / Port A
48 P2
3
/A
11
I/O 98 A
22
/TIOCB
1
/TP
5
/PA
5
I/O Address bus / Input capture / Pulse output / Port A
49 P2
4
/A
12
I/O 99 A
21
/TIOCA
2
/TP
6
/PA
6
I/O Address bus / Output comparison / Pulse output / Port A
50 P2
5
/A
13
I/O 100 A
20
/TIOCB
2
/TP
7
/PA
7
I/O Address bus / Input capture / Pulse output / Port A