8
UB99
LSI PIN DESCRIPTION
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
V
CC
CS
7
/TMO
0
/TP
8
/PB
0
CS
6
/TMIO
1
/TP
9
/PB
1
CS
5
/TMO
2
/TP
10
/PB
2
CS
4
/TMIO
3
/TP
11
/PB
3
TP
12
/PB
4
TP
13
/PB
5
TP
14
/PB
6
TP
15
/PB
7
RESO
V
SS
T
X
D
0
/P9
0
T
X
D
1
/P9
1
R
X
D
0
/P9
3
R
X
D
1
/P9
3
IRQ
4
/SCK
0
/P9
4
IRQ
5
/SCK
1
/P9
5
D
0
/P4
0
D
1
/P4
1
D
2
/P4
2
D
3
/P4
3
V
SS
D
4
/P4
4
D
5
/P4
5
D
6
/P4
6
P4
7
/D
7
P3
0
/D
8
P3
1
/D
9
P3
2
/D
10
P3
3
/D
11
P3
4
/D
12
P3
5
/D
13
P3
6
/D
14
P3
7
/D
15
V
CC
P1
0
/A
0
P1
1
/A
1
P1
2
/A
2
P1
3
/A
3
P1
4
/A
4
P1
5
/A
5
P1
6
/A
6
P1
7
/A
7
V
SS
P2
0
/A
8
P2
1
/A
9
P2
2
/A
10
P2
3
/A
11
P2
4
/A
12
P2
5
/A
13
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
Analog power 3.3V
Chip select / / / Port B
Data transmission / Port B
Reset
Ground
Data transmission / Port 9
Data reception / Port 9
Interropt request / Serial clock / Port 9
Data bus / Port 4
Ground
Data bus / Port 4
Port 4 / Data bus
Port 3 / Data bus
Analog power 3.3V
Port 1 / Address bus
Ground
Port 2 / Address bus
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P2
6
/A
14
P2
7
/A
15
P5
0
/A
16
P5
1
/A
17
P5
2
/A
18
P5
3
/A
19
V
SS
P6
0
/WAIT
P6
1
/BREO
P6
2
/BACK
P6
7
/
STBY
RES
NMI
V
SS
EXTAL
XTAL
V
CC
P6
3
/AS
P6
4
/RD
P6
5
/HWR
P6
6
/LWR
MD
0
MD
1
MD
2
AV
CC
V
REF
AN
0
/P7
0
AN
1
/P7
1
AN
2
/P7
2
AN
3
/P7
3
AN
4
/P7
4
AN
5
/P7
5
DA
0
/AN
6
/P7
6
DA
1
/AN
7
/P7
7
AV
SS
IRQ
0
/P8
0
CS
3
/IRQ
1
/P8
1
CS
2
/IRQ
2
/P8
2
ADTRG/CS
1
/IRQ
3
/P8
3
CS
0
/P8
4
V
SS
TCLKA/TP
0
/PA
0
TCLKB/TP
1
/PA
1
TCLKC/TIOCA
0
/TP
2
/PA
2
TCLKD/TIOCB
0
/TP
3
/PA
3
A
23
/TIOCA
1
/TP
4
/PA
4
A
22
/TIOCB
1
/TP
5
/PA
5
A
21
/TIOCA
2
/TP
6
/PA
6
A
20
/TIOCB
2
/TP
7
/PA
7
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I
I
I
-
I
O
-
O
O
O
O
I
I
I
-
I
I
I
I
I
I
I
I/O
I/O
-
O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Port 2 / Address bus
Port 5 / Address bus
Ground
Port 6
Port 6 / System clock output
Stand-by mode signal
Reset
Non-maskable interrupt
Ground
Clock
Clock
Power 3.3V
Port 6
Model control
Power 3.3V for A/D
Reference Voltage for A/D
Analog input / Port 7
D/A output / Analog input / Port 7
Ground for A/D
Interropt request / Port 8
Chip select / Interropt request / Port 8
Chip select / Interropt request / Port 8
Ground
Timer clock / Pulse output / Port A
Timer clock / Output comparison / Pulse output / Port A
Timer clock / Input capture / Pulse output / Port A
Address bus / Output comparison / Pulse output / Port A
Address bus / Input capture / Pulse output / Port A
Address bus / Output comparison / Pulse output / Port A
Address bus / Input capture / Pulse output / Port A
HD6413008VF25 (X4196A00) CPU (MAIN)
(LSI 端子機能表)