LMY2-MLAB
8
■
LSI PIN DESCRIPTION
（
LSI
端子機能表）
YAC509 (XM167A00) ADFC
PIN
No.
NAME
I/O
FUNCTION
PIN
No.
NAME
I/O
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
SI0 (L)
SI1 (L)
SI0 (R)
SI1 (R)
WCKI
BCKI
IMOD0 (*)
IMOD1 (*)
ITM0 (*)
ITM1 (*)
GSEL0 (*)
GSEL1 (*)
DFC (*)
GCC (*)
HTC (*)
CFT0 (*)
CFT1 (*)
I
I
I
I
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
Input to Lch LO gain side (IMOD0=1)
Input to Lch (IMOD0=0)
Input to Lch HI gain side (IMOD0=1)
Input to Rch LO gain side (IMOD0=1)
Input to Rch (IMOD0=0)
Input to Rch HI gain side (IMOD0=1)
Word clock input/output of serial input
Bit clock input/output of serial input
Setting of serial input modes. "1" = parallel,
"0" = serial
Setting of serial input modes. "1" =
asynchronous, "0" = synchronous
Setting of input data timing
(
"
)
Setting of a floating gain
(
"
)
Digital filter ON/OFF ("1"=ON, "0"=OFF)
Automatic adjustment of floating gain
ON/OFF ("1"=ON, "0"=OFF)
Quasi instantaneous cross fade bold time
ON/OFF ("1"=ON, "0"=OFF)
Setting of cross fade time
(
"
)
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
XO
XI
CK256A
MCK
BCKO
WCKO
SYNC
SOR
SOL
CKSEL (*)
RESET
MUTE (*)
OMD (*)
NSC (*)
Test4
Test5
VDD
GND
DLSP0 (*)
FLSW (*)
Test6 (*)
Test7 (*)
O
I
O
O
O
O
I/O
O
O
I
I
I
I
I
O
O
I
I
I
I
Connect X’tal OUT crystal oscillator or input
256fs clock to XI.
Connect X’tal IN crystal oscillator or input
256fs clock to XI.
Output clock which is inputted to 256fs OUT
XI.
Output 128fs clock.
Output 64fs bit clock which divides MCK
(It rises at the head of SYNC).
Output 1fs word clock which divides MCK
and of which the duty ratio is 50%.
Input/output of 1fs synchronous clock (The
fall of SYNC makes the 6th rise of 256fs
the head of WC.)
Output in order of Rch data and Lch data.
Output in order of Lch data and Rch data.
Switching of input or output of SYNC. "1" =
output, "0" = input.
Internal reset at "0".
Output "0" for output mute all at "0".
SOL, SOR output (switching of "0"MBS
First/"1" LSB First).
Noise shooping ON/OFF. "1"=OFF, "0"=ON.
Normally non-connected.
"
VDD(+5V)
GND
Floating delay switching.
("1"=16 sample delay, "0"=0 sample delay)
Floating inhibiting SW.
"1"= floating, "0"= floating is inhibited.
ADC of output wave at HI level side.
Normally non-connected.
"
ITM1
0
0
1
1
ITM0
0
1
0
1
Input timing (format)
Move forward 20 bits closer
16 bits B.B format
18 bits B.B format
20 bits B.B format
GSEL1
0
0
1
1
GSEL0
0
1
0
1
Floating gain
12 dB (2 bits)
18 dB (3 bits)
24 dB (4 bits)
30 dB (5 bits)
CFT1
0
0
1
1
CFT0
0
1
0
1
Cross fade time
0 ms
53 ms
106 ms
212 ms
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
