DM2000
60
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
MD1
MD2
Vcc-RTC*1
XTAL2
EXTAL2
Vss-RTC*1
NMI
IRO0/IRL0/PTH[0]
IRO1/IRL1/PTH[1]
IRO2/IRL2/PTH[2]
IRO3/IRL3/PTH[3]
IRO4/PTH[4]
D31/PTB[7]
D30/PTB[6]
D29/PTB[5]
D28/PTB[4]
D27/PYB[3]
D26/PTB[2]
VssO
D25/PTB[1]
VccO
D24/PTB[0]
D23/PTA[7]
D22/PTA[6]
D21/PTA[5]
D20/PTA[4]
Vss
D19/PTA[3]
Vcc
D18/PTA[2]
D17/PTA[1]
D16/PTA[0]
VssO
D15
VccO
D14
D13
D12
D11
D10
D9
D8
D7
D6
VssO
D5
VccO
D4
D3
D2
D1
D0
A0
A1
A2
A3
VssO
A4
VccO
A5
A6
A7
A8
A9
A10
A11
A12
A13
VssO
A14
VccO
A15
A16
A17
A18
A19
A20
A21
Vss
A22
Vcc
A23
VssO
A24
VccO
A25
BS/PTK[4]
RD
WE0/DOMLL
WE1/DOMLU/WE
WE2/DOMUL/ICIORD/PTK[6]
WE3/DOMUU/ICIOWR/PTK[7]
RD/WR
AUDSYNC/PTE[7]
VssO
CS0/MCS[0]
VccO
CS2/PTK[0]
CS3/PTK[1]
CS4/PTK[2]
CS5/CE1A/PTK[3]
CS6/CE1B
CE2A/PTE[4]
CE2B/PTE[5]
I
I
-
O
I
-
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I
I
I
I
-
I
-
I
I
I
I
I
I
I
I
I
-
I
-
I
I
I
I
I
I
I
-
I
-
I
-
I
-
I
I/O
O
O
O
I/O
I/O
O
I/O
-
O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Clock mode
Clock mode
Power supply for RTC (1.8 V)
Crystal oscillator for RTC
Crystal oscillator for RTC
Ground
Non-maskable interrupt request
Interrupt request/Input port H
Interrupt request/Input port H
Interrupt request/Input port H
Interrupt request/Input port H
Interrupt request/Input port H
Data bus/Port B
Data bus/Port B
Data bus/Port B
Data bus/Port B
Data bus/Port B
Data bus/Port B
Ground
Data bus/Port B
Power supply (3.3 V)
Data bus/Port B
Data bus/Port A
Data bus/Port A
Data bus/Port A
Data bus/Port A
Ground
Data bus/Port A
Power supply (1.8 V)
Data bus/Port A
Data bus/Port A
Data bus/Port A
Ground
Data bus
Power supply (3.3 V)
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Ground
Data bus
Power supply (3.3 V)
Data bus
Data bus
Data bus
Data bus
Data bus
Address bus
Address bus
Address bus
Address bus
Ground
Address bus
Power supply (3.3 V)
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Ground
Address bus
Power supply (3.3 V)
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
Ground
Address bus
Power supply (1.8 V)
Address bus
Ground
Address bus
Power supply (3.3 V)
Address bus
Bus cycle signal start/Port K
Read strobe
D7-D0 select sugnal/DOM (SDRAM)
D15-D8 select signal/DOM (SDRAM)
D23-D16 select signal/DOM (SDRAM)/PCMCIA I/O read/Port K
D31-D24 select signal/DOM (SDRAM)/PCMCIA I/O write/Port K
Read/Write
AUD sync. signal/Port E
Ground
Chip select/Mask ROM chip select
Power supply (3.3 V)
Chip select2/Port K
Chip select3/Port K
Chip select4/Port K
Chip select5/CE1/Port K
Chip select6/CE1
Card enable/Port E
Card enable/Port E
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
CKE/PTK[5]
RAS3L/PTJ[0]
RAS2L/PTJ[1]
CASLL/CASL/PTJ[2]
VssO
CASLH/CASU/PTJ[3]
VccO
CASHL/PTJ[4]
CASHH/PTJ[5]
DACK0/PTD[5]
DACK1/PTD[7]
CAS2L/PTE[6]
CAS2H/PTE[3]
RAS3U/PTE[2]
RAS2U/PTE[1]
TDO/PTE[0]
BACK
BREO
WAIT
RESETM
ADTRG/PTH[5]
IOISI6/PTG[7]
ASEMD0/PTG[6]
ASEBRKAK/PTG[5]
PTG[4]
AUDATA[3]/PTG[3]
AUDATA[2]/PTG[2]
Vss
AUDATA[1]/PTG[1]
Vcc
AUDATA[0]/PTG[0]
TRST/PTF[7]/PINT[15]
TMS/PTF[6]/PINT[14]
TDI/PTF[5]/PINT[13]
TCK/PTF[4]/PINT[12]
IRLS[3]/PTF[3]/PINT[11]
IRLS[2]/PTF[2]/PINT[10]
IRLS[1]/PTF[1]/PINT[9]
IRLS[0]/PTF[0]/PINT[8]
MD0
Vcc-PLL1*2
CAP1
Vss-PLL1*2
Vss-PLL2*2
CAP2
Vcc-Pll2*2
AUDCK/PTH[6]
Vss
Vss
Vcc
XTAL
EXTAL
STATUS0/PTJ[6]
STATUS1/PTJ[7]
TCLK/PTH[7]
IROOUT
VssO
CKIO
VccO
TxD0/SCPT[0]
SOK0/SCPT[1]
TxD1/SCPT[2]
SCK1/SCPT[3]
TxD2/SCPT[4]
SCK2/SCPT[5]
RTS2/SCPT[6]
RxD0/SCPT[0]
RxD1/SCPT[2]
Vss
RxD2/SCPT[4]
Vcc
CTS2/IRO5/SCP[7]
MCS[7]/PTC[7]/PINT[7]
MCS[6]/PTC[6]/PINT[6]
MCS[5]/PTC[5]/PINT[5]
MCS[4]/PTC[4]/PINT[4]
VssO
WAKEUP/PTD[3]
VccO
RESETOUT/PTD[2]
MCS[3]/PTC[3]/PINT[3]
MCS[2]/PTC[2]/PINT[2]
MCS[1]/PTC[1]/PINT[1]
MCS[0]/PTC[0]/PINT[0]
DRAK0/PTD[1]
DRAK1/PTD[0]
DREQ0/PTD[4]
DREQ1/PTD[6]
RESETP
CA
MD3
MD4
MD5
AVss
AN[0]/PTL[0]
AN[1]/PTL[1]
AN[2]/PTL[2]
AN[3]/PTL[3]
AN[4]/PTL[4]
AN[5]/PTL[5]
AVcc (3.3 V)
AN[6]/DA[1]/PTL[6]
AN[7]/DA[0]/PTL[7]
AVss
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I/O
I
I/O
I/O
-
I/O
-
I/O
I
I
I
I
I
I
I
I
I
-
-
-
-
-
-
I
-
-
-
O
I
I/O
I/O
I/O
O
-
I/O
-
O
I/O
O
I/O
O
I/O
I/O
I
I
-
I
-
I
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
-
I
I
I
I
I
I
-
I
I
-
CK enable/Port K
DRAM row address strobe/Port J
DRAM row address strobe/Port J
Column address strobe (low)/Port J
Ground
Column address strobe (high)/Port J
Power supply (3.3 V)
HL Column address strobe/Port J
HH Column address strobe/Port J
DMA acknowledge transfer strobe 0/Port D
DMA acknowledge transfer strobe 1/Port D
Column address strobe (low)/Port E
Column address strobe (high)/Port E
DRAM address strobe/Port E
DRAM address strobe/Port E
Test data output/Port E
Bus acknowledge
Bus request
Hardware wait request
Reset
Analog trigger/Input port H
Write protect/Area 6 input/Input port G
ASE mode/Input port G
ASE break acknowledge/Input port G
Input port G
AUD data/Input port G
AUD data/Input port G
Ground
AUD data/Input port G
Power supply (1.8 V)
AUD data/Input port G
Test reset/Input port F/Interrupt port
Test mode switch/Input port F/Interrupt port
Input test data/Input port F/Interrupt port
Test clock/Input port F/Interrupt port
Interrupt request/Input port F/Interrupt port
Interrupt request/Input port F/Interrupt port
Interrupt request/Input port F/Interrupt port
Interrupt request/Input port F/Interrupt port
Clock mode
PLL1 Power supply (1.8 V)
PLL1 capacitor
PLL1 Ground
PLL2 Ground
PLL2 capacitor
PLL2 Power supply (1.8 V)
AUD clock/Input port H
Ground
Ground
Power supply (1.8 V)
Clock oscillator
Clock/Crystal oscillator
cessor status/Port J
Pross./Port J
Clock/Port H
'Interrupt request
Ground
System Clock
Power supply (3.3 V)
Data transmission 0/Output port
Serial clock/Port
Data transmission 1/Output port
Serial clock/Port
Data transmission 2/Output port
Serial clock/Port
Request to send 2/Output port
Data reception 0/Output port
Data reception 1/Output port
Ground
Data reception 2/Output port
Power supply (1.8 V)
Clear to send 2/Interrupt request/Input port
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
Ground
Standby mode/Port D
Power supply (3.3 V)
Reset output/Port D
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
Mask chip select/Port C/Interrupt port
DMA transfer request/IPort D
DMA transfer request/IPort D
DMA transfer request/Input port D
DMA transfer request/Input port D
Power on reset
Chip active/Hardware stand by request
Area 0 bus allocation
Area 0 bus allocation
Area 0 bus allocation
Ground
AD converter input/Input port L
AD converter input/Input port L
AD converter input/Input port L
AD converter input/Input port L
AD converter input/Input port L
AD converter input/Input port L
Analog Power supply (3.3 V)
AD converter input/Input port L
AD converter input/Input port L
Ground
SH7709A FP-208C (XY065A00) CPU
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
Содержание DM 2000 Version 2
Страница 37: ...37 DM2000 Top View Shield Box Cover Shield Box Power Supply Unit BRG JK2 OPT DSP SW Inside the shield box ...
Страница 80: ...DM2000 80 AD Circuit Board to DSP CN952 CN954 to DSP CN951 CN953 A A 3NA V628540 2 1 ...
Страница 82: ...DM2000 82 AD Circuit Board B B 3NA V628540 2 1 ...
Страница 83: ...83 DM2000 Pattern side B B 3NA V628540 2 1 ...
Страница 88: ...DM2000 88 D D BRG Circuit Board 3NA V628730 2 2 ...
Страница 89: ...89 DM2000 D D Pattern side 3NA V628730 2 2 ...
Страница 91: ...91 DM2000 CPU Circuit Board Pattern side 3NA V776550 3 3 ...
Страница 94: ...DM2000 94 to DSP CN955 to BRG CN009 1 2 3 4 5 6 7 8 OMNI OUT DA1 Circuit Board Component side 3NA V628550 1 2 ...
Страница 95: ...95 DM2000 Pattern side DA1 Circuit Board 3NA V628550 1 2 ...
Страница 97: ...97 DM2000 Pattern side 3NA V628560 1 DA2 Circuit Board ...
Страница 100: ...DM2000 100 F F DSP Circuit Board 3NA V628520 3 1 ...