CDC-E500
CDC-E500
27
■
IC DATA
IC201 : M30622M8A-XXXFP
16 bit
µ
-COM
SVP
SVP
VCT
R2
R3
R0L
R1L
R0H
R1H
A-D Converter
(10 bits x 8 channels
Expandable up to 10 channels)
UART/clock synchronous SI/O
(8 bits x 3 channels)
Clock synchronous SI/O
(8 bits x 2 channels)
CRC arithmetic circuit (CCITT)
(Polynominal: X16+X12+X5+1)
Port P0
8
PC
ISP
USP
FB
SB
A0
A1
R2
R3
R0L
R1L
R0H
R1H
Registers
Program counter
Stack pointer
INTB
FLG
Vector table
Flag register
Timer
System clock generator
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A Converter
(8 bits x 2 channels)
X
IN
- X
OUT
X
CIN
- X
COUT
Internal peripheral Functions
I/O Port
Port P1
8
Port P2
8
Port P3
8
8
Port P4
Po
rt
P
7
8
Po
rt
P
8
7
P
o
rt
P85
Po
rt
P
9
8
8
P
o
rt
P10
Port P5
8
8
Port P6
80
P1
0
/D
8
79
P1
1
/D
9
78
P1
2
/D
10
77
P1
3
/D
11
76
P1
4
/D
12
75
P1
5
/D
13
/INT
3
74
P1
6
/D
14
/INT
4
73
P1
7
/D
15
/INT
5
72
P2
0
/A
0
(/D
0
/–
)
71
P2
1
/A
1
(/D
1
/D
0
)
70
P2
2
/A
2
(/D
2
/D
1
)
69
P2
3
/A
3
(/D
3
/D
2
)
68
P2
4
/A
4
(/D
4
/D
3
)
67
P2
5
/A
5
(/D
5
/D
4
)
66
P2
6
/A
6
(/D
6
/D
5
)
65
P2
7
/A
7
(/D
7
/D
6
)
64
V
SS
63
P3
0
/A
8
(/-/D
7
)
62
V
CC
61
P3
1
/A
9
60
P3
2
/A
10
59
P3
3
/A
11
58
P3
4
/A
12
57
P3
5
/A
13
56
P3
6
/A
14
55
P3
7
/A
15
54
P4
0
/A
16
53
P4
1
/A
17
52
P4
2
/A
18
51
P4
3
/A1
9
50
P4
4
/CS
0
49
P4
5
/CS
1
48
P4
6
/CS
2
47
P4
7
/CS
3
46
P5
0
/WRL/WR
45
P5
1
/WRH/BHE
44
P5
2
/RD
43
P5
3
/BCLK
42
P5
4
/HLDA
41
P5
5
/HOLD
40
P5
6
/ALE
39
P5
7
/RDY/CLK
OUT
38
P6
0
/CTS
0
/RTS
0
37
P6
1
/CLK
0
36
P6
2
/R
X
D
0
35
P6
3
/T
X
D
0
34
P6
4
/CTS
1
/RTS
1
/CLKS
1
33
P6
5
/CLK
1
32
P6
6
/R
X
D
1
31
P6
7
/T
X
D
1
P0
7
/D
7
P0
6
/D
6
P0
5
/D
5
P0
4
/D
4
P0
3
/D
3
P0
2
/D
2
P0
1
/D
1
P0
0
/D
0
P10
7
/AN
7
/KI
3
P10
6
/AN
6
/KI
2
P10
5
/AN
5
/KI
1
P10
4
/AN
4
/KI
0
P10
3
/AN
3
P10
2
/AN
2
P10
1
/AN
1
AV
SS
P10
0
/AN
0
V
REF
AV
CC
P9
7
/AD
TRG
/S
IN
4
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P9
6
/ANEX
1
/S
OUT4
P9
5
/ANEX
0
/CLK
4
P9
4
/D
A
1
/TB
4IN
P9
3
/D
A
0
/TB
3IN
P9
2
/TB
2IN
/S
OUT3
P9
1
/TB
1IN
/S
IN3
P9
0
/TB
0IN
/CLK
3
BYTE
CNV
SS
P8
7
/X
CIN
P8
6
/X
COUT
RESET
X
OUT
V
SS
X
IN
V
CC
P8
5
/NMI
P8
4
/INT
2
P8
3
/INT
1
P8
2
/INT
0
P8
1
/T
A4
IN
/U
P8
0
/T
A4
OUT
/U
P7
7
/T
A3
IN
P7
6
/T
A3
OUT
P7
5
/T
A2
IN
/W
P7
4
/T
A2
OUT
/W
P7
3
/CTS
2
/R
TS
2
/T
A1
IN
/V
P7
2
/CLK
2
/T
A1
OUT
/V
P7
1
/R
X
D
2
/SCL/T
A
0
IN
/TB5
IN
P7
0
/T
X
D
2
/SD
A
/T
A0
OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
M16C/60 Series 16 bit CPU core
M30622M8A-XXXFP
Содержание CDC-E500
Страница 5: ...CDC E500 CDC E500 5 REAR PANELS U C models A model ...
Страница 23: ...CDC E500 CDC E500 23 TIMING CHART ...