XIMEA xiX-XL, Руководство пользователя

Страница: 53 / 111

2.10.3 Non-isolated digital lines
Item Parameter / Note
Number of digital lines 4 , each line can be configured by application separately as input or output
Maximal input voltage 24 V DC
Common pole YES
Effect of incorrect input terminal connection Reverse voltage polarity protected
Effects when withdrawing/inserting input module under power No damage, no lost data
Protection Short-circuit / over-current / reverse voltage
Maximal output sink current 30 µA Maximal advised load = 60 k
Ω
Inductive loads False
Output Level logical 0 < 0.4 V Load 100 k Ω
Output Level logical 1 > 2.5 V Load 100 k
Ω
Output delay - rising edge 400 ns Load 100 k Ω threshold 2 V
Output delay - falling edge 450 ns Load 100 k Ω threshold 0.5 V
Input impedance- minimum 15 k Ω
Input level for logical 0 < 0.7 V
Input level for logical 1 > 2.4 V
Input debounce filter No
Input delay - rising edge 750 ns V
INPUT
= 5 V
Input delay - falling edge 1200 ns V
INPUT
= 5 V
Input functions Trigger, rising or falling edge are supported for trigger
Output functions False, signal inversion supported
Table 23: non isolated digital lines - digital input/output (INOUT)
Non isolated Digital lines can be used as inputs or outputs compatible with TTL logic. These are high impedance pins so when used as
output high impedance slave input has to be used.
Figure 39: non isolated input/output, interface schematic
XIMEA Technical Manual, Version: v240108 46