Xilinx LogiCORE IP Video In to AXI4-Stream v1.0, Руководство по эксплуатации продукта

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Video In to AXI4-Stream www.xilinx.com 10
PG043 April 24, 2012 Product Specification
Core Interfaces and Register Space
Core Interfaces and Register Space
Port Descriptions
The Video In to AXI4-Stream core uses industry standard control and data interfaces to
connect to other system components. The following sections describe the various interfaces
available with the core. Figure 2-1 illustrates an I/O diagram of the Video In to AXI4-Stream
Table 2-2: Virtex-7
Data Width FIFO Depth LUTs FFs RAM 36/18 Fmax (MHz)
8 32 83 104 0/0 337
24 1024 120 161 1/0 309
64 8192 221 262 16/1 309
Table 2-3: Virtex-6
Data Width FIFO Depth LUTs FFs RAM 36/18 Fmax (MHz)
8
32 79 104 0/0 303
24 1024 120 161 1/0 236
64 8192 209 262 16/1 186
Table 2-4: Kintex-7
Data Width FIFO Depth LUTs FFs RAM 36/18 Fmax (MHz)
8 32 79 104 0/0 357
24
1024 119 161 1/0 320
64 8192 208 262 16/1 320
Table 2-5: Artix-7
Data Width FIFO Depth LUTs FFs RAM 36/18 Fmax (MHz)
8 32 80 104 0/0 265
24 1024 113 161 1/0 222
64
8192 208 262 16/1 222
Table 2-6: Zynq-7000
Data Width FIFO Depth LUTs FFs RAM 36/18 Fmax (MHz)
8 32 74 104 0/0 261
24 1024 111 161 1/0 211
64 8192 209 262 16/1 211