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FMC XM104 Connectivity Card User Guide

www.xilinx.com

19

UG536 (v1.1) September 24, 2010

Board Technical Description

Silicon Labs Si536

8

A Silicon Labs Si5368 any-rate precision clock multiplier/jitter attenuator integrated 
circuit provides a wide range of clocking applications for the Xilinx board and XM104 
combination. 

Table 1-13

 shows the connections of the SI5368 differential clock outputs to 

the XM104 FMC HPC connector. 

Table 1-13

 also shows connections of the clock outputs 

from the board to the inputs of the SI5368.

Table 1-13:

Si5368 Clock I/O Connections to FMC HPC Connector J1

FMC Connector J1 

Pin

Signal Name

I/O Standard

Si5368 In/Out

Si5368

H4

CLK0_M2C_P

LVDS

Output

CKOUT5/FS_OUT_P

H5

CLK0_M2C_N

LVDS

CKOUT5/FS_OUT_N

G2

CLK1_M2C_P

LVDS

Output

CKOUT2_P

G3

CLK1_M2C_N

LVDS

CKOUT2_N

K4

CLK2_M2C_P

LVDS

Output

CKOUT3_P

K5

CLK2_M2C_N

LVDS

CKOUT3_N

J2

CLK3_M2C_P

LVDS

Output

CKOUT4_P

J3

CLK3_M2C_N

LVDS

CKOUT4_N

D4

GBTCLK0_M2C_P

LVDS

Output

CKOUT1_P

D5

GBTCLK0_M2C_N

LVDS

CKOUT1_N

G6

LA00_CC_P

LVDS

Input

CKIN1_P

G8

LA00_CC_N

LVDS

CKIN1_N

-

CLK_SI570_P

LVDS

Input

CKIN2_P

-

CLK_SI570_N

LVDS

CKIN2_N

D8

LA01_CC_P

LVDS

Input

CKIN3_P

D9

LA01_CC_N

LVDS

CKIN3_N

D20

LA17_CC_P

LVDS

Input

CKIN4_P

D21

LA17_CC_N

LVDS

CKIN4_N

G13

LA08_N

LVCMOS_Vadj

Input

C2A

G12

LA08_P

LVCMOS_Vadj

Input

C1A

H14

LA07_N

LVCMOS_Vadj

I/O

CS1_C4A

(1)

H13

LA07_P

LVCMOS_Vadj

Input

INC

C11

LA06_N

LVCMOS_Vadj

Input

DEC

C10

LA06_P

LVCMOS_Vadj

Output

LOL

D11

LA05_P

LVCMOS_Vadj

Input

FS_ALIGN

H12

LA04_N

LVCMOS_Vadj

I/O

CS0_C3A

(1)

H10

LA04_P

LVCMOS_Vadj

Output

INT_ALM

Содержание FMC XM104

Страница 1: ...FMC XM104 Connectivity Card User Guide UG536 v1 1 September 24 2010...

Страница 2: ...ssly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information THE DOCUMENTATION IS DISCLOSED TO YOU AS IS WITH NO WARRA...

Страница 3: ...sary Equipment 8 System Setup 8 Technical Support 9 Board Technical Description 10 Detailed Description 11 1 VITA 57 1 FMC HPC Connector J1 13 2 Multi Gigabit Transceiver Data Port 0 13 3 Multi Gigabi...

Страница 4: ...4 www xilinx com FMC XM104 Connectivity Card User Guide UG536 v1 1 September 24 2010...

Страница 5: ...ns for additional documentation on Xilinx tools and solutions ISE Design Suite www xilinx com ise Answer Browser www xilinx com support Intellectual Property www xilinx com ipcenter The XM104 can be u...

Страница 6: ...6 www xilinx com FMC XM104 Connectivity Card User Guide UG536 v1 1 September 24 2010 Preface About This Guide...

Страница 7: ...ws SP601 Si5368 clock source only SP605 Si5368 clock source and Data Port 0 DP0 channel ML605 LPC J63 Si5368 and DP0 channel ML623 Si5368 clock source only SP623 Si5368 clock source only Table 1 1 FMC...

Страница 8: ...page 5 1 Turn off the DC power switch and disconnect the input power source from the board 2 Remove the XM104 from the electrostatic device ESD bag 3 Using a small Phillips screwdriver remove the two...

Страница 9: ...inx offers technical support for this product only when used in conjunction with boards listed in Table 1 1 For assistance with the XM104 and Xilinx boards contact Xilinx for technical support at www...

Страница 10: ...ce and a Si5368 any rate precision clock multiplier and jitter attenuator integrated circuits provide a variety of programmable differential clock sources to the board s FGPA The Si5368 integrated cir...

Страница 11: ...tailed Description The numbered features in Figure 1 3 correlate to the features and notes listed in Table 1 2 page 12 For full functionality the XM104 must be installed on a board FMC connector suppo...

Страница 12: ...The connector is mounted on the bottom side of the XM104 This connector is mounted on the bottom side of the card 6 5 MGT Data Port 3 Serial ATA Port 2 FPGA multi gigabit transceiver data port 3 on Se...

Страница 13: ...eiver Data Port 0 Board FPGA multi gigabit transceiver Data Port 0 signals are wired to SMA connectors on the XM104 Data Port 0 connections between the XM104 FMC HPC connector and four SMA connectors...

Страница 14: ...3 signals are wired to a Serial ATA host connector J12 on the XM104 Data Port 3 connections on the XM104 FMC HPC connector and Serial ATA connector J12 are defined in Table 1 6 Table 1 5 FPGA Multi Gi...

Страница 15: ...l requires a bus master to initiate communication to a peripheral device using a start condition followed by a device select code The device select code consists of a 4 bit Device Type Identifier and...

Страница 16: ...ddressing protocol requires a bus master to initiate communication to a peripheral device using a start condition followed by a device select code The device select code consists of a 4 bit Device Typ...

Страница 17: ...Guide www xilinx com 17 UG536 v1 1 September 24 2010 Board Technical Description The two downstream IIC devices connected to the PCA9543 are at the following IIC addresses Si570 IIC address is at 0x5...

Страница 18: ...s connected one of the Si5368 differential clock inputs The default clock frequency is 156 25 MHz Connections to the FMC HPC connector are defined in Table 1 11 The component installed on the XM104 is...

Страница 19: ...VDS Output CKOUT5 FS_OUT_P H5 CLK0_M2C_N LVDS CKOUT5 FS_OUT_N G2 CLK1_M2C_P LVDS Output CKOUT2_P G3 CLK1_M2C_N LVDS CKOUT2_N K4 CLK2_M2C_P LVDS Output CKOUT3_P K5 CLK2_M2C_N LVDS CKOUT3_N J2 CLK3_M2C_...

Страница 20: ...ish clock outputs The Si5368 is located at IIC address 0x68 For additional application information on the Si5368 component see the manufacturer s data sheet at www silabs com G10 LA03_N LVCMOS_Vadj Ou...

Страница 21: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Xilinx HW FMC XM104 G...

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