Circuit Description
12/98
7 - 13
WorkCentre 385
FIG. 7-6: ECP HARDWARE HANDSHAKING TIMING (FORWARD)
1.
The host places data on the data lines and indicates a data cycle by setting nAUTOFD.
2.
Host asserts nSTROBE low to indicate valid data.
3.
Peripheral acknowledges host by setting BUSY high.
4.
Host sets nSTROBE high. This is the edge that should be used to clock the data into the Peripheral.
5.
Peripheral sets BUSY low to indicate that it is ready for the next byte.
6.
The cycle repeats, but this time it is a command cycle because nAUTOFD is low.
1
2
3 4
5
6
nSTROBE
BUSY
PPD (7:0)
nAUTOFD
BYTE0
DATA BYTE
BYTE1
COMMAND BYTE
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Содержание WorkCentre 385
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