EPX-C414/Configuration
v1.0
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Page 48
No power is supplied when jumped 1-2.
3.3V is supplied when jumped 2-3.
Layout and Pin Reference
7.11.9 JPFPGA
JPFPGA is the JTAG programming header for the FPGA configuration EEPROM. JPFPGA
is a 1x6 header reserved for manufacturer programming only.
7.11.10 JPMC1 and JPMC2 MiniPCie
The MiniPCie connectors at MC1 and MC2 include a jumper to disable the WLAN card, if
installed. JPMC1 enables/disables WLAN at MC1. JPMC2 enables/disables WLAN at
MC2.
7.12 LED Indicators
7.12.1 LED1, LED2 Ethernet LEDs
There are two Ethernet controllers on the EPX-C414 board. On the top side of the board,
two headers (LED1 and LED2) drive remotely mounted LEDs or other inputs. Each
controller has three LEDs on the bottom of the board to indicate connectivity status.
Refer to Table 21 for details.
Jumper
PC/104-Plus Power Setting
1-2
From Pin 5 of power connector (default)
2-3
From o3.3V
1
2
3
Connector
Pin Reference
JPMC1
1-2 – Disables WLAN at MC1
2-3 – Enables WLAN at MC1
JPMC2
1-2 – Disables WLAN at MC2
2-3 – Enables WLAN at MC2