WJ-8711A DIGITAL HF RECEIVER
CIRCUIT DESCRIPTION
6-11
16
17
18
19
20
21
22
23
24
15
9
8
1
5
6
7
10
M1
CONTROL
PROCESSOR
(SLAVE)
LATCH
MEM/
SCAN
ENCODER
MCSHA
MCSHB
LATCH
SPECIAL
FUNCTION ENCODER
SFCHA
SFCHB
LATCH
FREQ
TUNE
ENCODER
FRCHA
FRCHB
MSRESET*
SFRESET*
FRRSET*
ADDRESS DECODER
DIS 1-9*
UPSEGEN*
LOWSEGEN*
DIGDREN*
KEYRD*
EPROM
DIS 7-9*
MEMORY
&
SCAN
DISPLAY
DIS 1-6*
AUX
PARAMETERS
&
SPECIAL
FUNCTIONS
DISPLAY
SEGMENT
ENABLE LATCH
(00-11)
SEGEN 00-11
SEGMENT
DRIVERS
SEG DRIVE 0-7
FREQUENCY
INDICATOR
MISC
INDICATORS DS19-DS27
DIGIT
DRIVERS
0-7
DIGIT
DRIVE LATCH
DIG/COL 0-7
DIG DRIVE
5-7
SWITCH/INDICATOR
AND KEYPAD
MATRIX
SEG DRIVE
8-11
DIG DRIVE
0-4
BUS
DRIVER
DATA BUS
2
1 3
+5V
GND
GND
J1
ADDRESS BUS
DIG DRIVE
5-7
SEG DRIVE 0-10
DIG/COL 0-7
KPROW 1-6
1
2
3
R
39
R
40
J3
E7
DIGITAL
INTERFACE
TO A2
DIGITAL
ASSEMBLY
SPKR HIPOT
SPKR WIPER
SPKR LOPOT
SPKR HIPOT
PHONES WIPER
PHONES LOPOT
PHONES LEFT
PHONES COM
PHONES RIGHT
SS METER
FPINT*
FPACK*
FPCLK (8MHz)*
SCLK
MOSI
MISO
HWRESET*
87IL31
Figure 6-4. Type 797015-1 Front Panel Assembly Functional Block Diagram
Courtesy of http://BlackRadios.terryo.org
Содержание WJ-8711A
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