October 1999
Part No. 001-2009-201
10-27
MAIN PROCESSOR CARD SCHEMATIC (1 OF 2)
FIGURE10-32
50
51
A0 42
A1 10
A2 41
A3 9
A4 40
A5 5
A6 39
A7 7
A8 38
A9 6
A10 37
A11 5
A12 36
A13 4
A14 35
A15 3
A16 34
A17 2
A18 33
A19 1
IRDB+ 25
IRDB- 57
31
P1
32
63
64
19
20
54
18
DS1
ALARM DISPLAY
U26
14495L
DISPLAY DRIVER
2
3
4
5
7
8
9
10
5
6
9
10
2
3
1
15
4
14
13
12
1
6
f
g
e
d
h+i
c
b
a
A
B
C
D
CL
U27
UPD70320
U15F
U15E
U15D
U15C
U15B
8
7
6
5
4
PO4
PO3
PO2
PO1
PO0
4
6
8
10
12
13
11
9
5
3
R17
2.2k
R18
2.2k
R19
2.2k
R20
2.2k
R2
2.2k
CR1
CR2
CR5
CR4
CR3
+15V
R12
10k
59
3
43
46
NM1
EA
CTS0
CTS1
48
51
52
54
DMARQ0
DMAAK0
TC0
DMARQ1
+5V
R14
10k
U24
SN65176B
45
47
63
10
RXD1
TXD1
INT/POLL
PO5
1
4
3
R
D
DE
A
B
6
7
8
7
10
9
S2
R11
1.2k
R10
200
R9
1.2K
+12V
R29
10k
2
5
RE
GND
R34
10k
-5V
+5V
U15A
74C906
R38
20k
+15V
LPTT 21
RNT TX DATA 22
READ 47
MSTB 16
RNT RX DATA 23
44
41
84
83
TXD0
RXD0
MSTB
R/W
U20C
R30
10k
R31
10k
U6A
74HC32
U6B
WRITE 48
1
2
1
2
3
5
4
6
8
9
10
+5V
2 MREQ
INTP0
INTP1 CLK OUT
60
61
69
MREQ 15
U6-9 (2)
U7-1 (2)
D0 46
D2 45
D3 13
D4 44
D5 12
D6 43
D7 11
D1 14
52
53
55
58
-5V IN 27
-5V IN 59
SOURCE
55
58
HSDB- 24
HSDB+ 56
S2-15 (2)
S2-16 (2)
+15V IN 30
+15V IN 62
Z1
3
1
2
C15
.01
+ C17
47
U12
78L12
3
1
2
+15V
SOURCE
+12V
SOURCE
49
17
Z2
3
1
2
+5v IN 29
+5V IN 28
+5V IN 61
+5V IN 60
C16
.01
+ C18
47
+5V
SOURCE
C4
.01
C5
.01
C6
.01
C7
.01
C10
.01
C11
.01
C12
.01
C20
.01
C21
.01
C22
.01
C23
.01
C26
.01
C30
.01
C31
.01
C32
.01
C24
.01
C25
.01
C27
.01
C28
.01
COMPUTER TX 2
1
COMPUTER RX 3
MODEM DCD 4
U16D
U16C
U16F
145406
6
11
3
4
14
13
19
3
18
14
12 C1 D
RxRDY
TxE
TxD
RxD
U22
82C51
21
13
10
RESET
RD
WR
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7 8
7
6
5
2
1
28
27
11
CS
2
4
6
8
10
12
14
13
11
9
7
5
3
1
J3
J3
U21
MC14024
O0
O1
O2
O3
O4
O5
O6
12
11
9
6
5
4
3
MR 2
76800
38400
19200
9600
4800
2400
1200
CP
1
20
PT2
9
25
TxC
RxC
CTS
DSR
17
22
U2D
8
9
U2E
10
11
Y3
2.4575 MHz
R1
10M
R4
2k
C29
62pF
C19
62pF
CLOCK
J1
TOUT
66
U30-1 (2)
READY
U19-2 (2)
PT1
64
68
U10-25 (2)
PT0 67
U9-3 (2)
P06 11
U9-27 (2)
Y1
10 MHz
C1
10pF
C8
10pF
79
78
X2
X1
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7 20
19
18
17
16
15
14
13
R39
270k
74
PT7
+15V
81
RESET
A18
40
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
A19
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
PWD
OE
WE
CE
24
31
22
+5V
1
Vpp
J2-2 (2)
D0
D1
D2
D3
D4
D5
D6
D7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7 21
20
19
18
17
15
14
13
DATA BUS (7:0)
R15
10k
+5V
R16
10k
R3
0
S1
RESET
6
8
3
1
2
4
5
7
RST
ST
TD
PBRST
TDL
GND
RST
Vcc
U17
RESET
3 DISABLE
2
1 WATCHDOG
J6
U20B
U20A
74HC00
4
6
5
3
1
2
D
20
16
17
21
22
23
C
B
A
O14
O15
U5
74HC154
A19
A18
A19
A16
O13
O11
O0
15
13
1
18
19
G2
G1
7 Y7
G2B
A13
A14
A15
1
2
3
5
A
B
C
Y0
Y1
U4
74HC138
6
15
14
G1
+5V
Y2
13
G2A
U6-10 (2)
U7-2 (2)
D0
D1
D2
D3
D4
D5
D6
D7
19
18
17
16
15
13
12
11
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
10
9
8
7
8
5
4
5
25
24
21
23
2
26
1
U18
60L256
EPROM
U25
28F001BX
FLASH MEMORY
MAIN MICROPROCESSOR
E
W
G
20
27
22
D0
D1
D2
D3
D4
D5
D6
D7
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
22
21
20
19
18
15
14
13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
11
10
8
8
7
6
5
4
29
28
24
27
3
U28
28C64
RAM
OE
25
WE
31
CE
23
49
12
76
9
49
53
75
VTH
IC9
IC49
IC53
IC75
CLK
OPERATIONAL
BLINKING
ON = HIGH POWER
OFF = LOW POWER
ON = LTR
OFF = MULTI-NET
ALARM
ALARM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
4
7
Содержание VX 900 MHz LTR
Страница 2: ...1 2 October 1995 Part No 001 2008 202...
Страница 4: ...1 4 October 1995 Part No 001 2008 202...
Страница 24: ...INTRODUCTION AND OPERATION 1 10 October 1999 Part No 001 2009 201...
Страница 26: ...INTRODUCTION AND OPERATION 1 12 October 1999 Part No 001 2009 201...
Страница 40: ...INSTALLATION 2 14 October 1999 Part No 001 2009 201...
Страница 56: ...PULL DOWN MENUS 4 12 October 1999 Part No 001 2009 201...
Страница 60: ...REPEATER PROGRAMMING 5 4 October 1999 Part No 001 2009 201...
Страница 142: ...SERVICING 8 8 October 1999 Part No 001 2009 201...
Страница 191: ...SCHEMATICS AND COMPONENT LAYOUTS 10 9 October 1999 Part No 001 2009 201 Figure 10 14 RECEIVE VCO COMPONENT LAYOUT...
Страница 234: ...900 MHz CHANNEL FREQUENCY CHART A 6 October 1999 Part No 001 2009 201 This page intentionally left blank...