Carrier Board Design Guide for SOM-9X35 Module
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2.2.8
Differential Pair Signals
It is not permitted to place any components or vias between the differential pairs, even if the signals are routed
symmetrically. Components and vias between the pairs could lead to EMC compliance problems and create an
impedance discontinuity.
Figure 18: Do not put any components or vias between differential pairs
Vias introduce a huge discontinuity in impedance. Try to reduce the amount of placed vias to a minimum and
place the vias symmetrically.
Figure 19:
Place vias symmetrical
In order to meet the impedance requirements of a differential pair, both signal traces need to be routed on the
same layer. Add the same amount of vias to the traces.
Figure 20: Route pairs on the same layer, place same amount of vias
2.2.9
Length Matching
High-speed interfaces have additional requirements regarding the time of arrival skew between different traces
and pairs of signals. For example, in a high-speed parallel bus, all data signals need to arrive within a time
period in order to meet the setup and hold time requirements of the receiver. The carrier board designer needs
to make sure that the permitted skew is not exceeded. In order to meet this requirement, length matching is
required. Often, the requirements are given as a maximum time skew.
Differential pair signals often require a very tight delay skew between the positive and negative signal traces.
Therefore, length differences need to be compensated for using serpentines (also called meanders). The
geometry of serpentine traces needs to be carefully chosen in order to reduce impedance discontinuity. The
following figure shows the requirements for ideal serpentine traces.