System Setup
35
VL-EPU-4011 BIOS Reference Manual
System Setup
→
South Cluster Configuration
→
PCI Express
Configuration
Option: PCI Express Clock Gating
Disabled
Enabled (default)
Details: PCI Express Clock Gating Enable/Disable for each root port.
Option: Port8xh Decode
Disabled (default)
Enabled
Details: PCI Express Port8xh Decode Enable/Disable.
Option: Port8xh Decode Port#
Minimum = 0x00
Maximum = 0x14
Default = 0x00
Details: Select PCI Express Port8xh Decode Root Port. User to ensure port availability
Option: Peer Memory Write Enable
Disabled (default)
Enabled
Details: Peer Memory Write Enable/Disable
Option: Compliance Mode
Disabled (default)
Enabled
Details: Compliance Mode Enable/Disable