SARA-N2 series - System Integration Manual
UBX-17005143 - R06
System description
Page 19 of 82
1.9.1.3
UART and deep sleep mode
To limit the current consumption, SARA-N2 modules automatically enter deep-sleep mode whenever
possible, that is if there is no data to transmit or receive. When in deep-sleep mode the UART interface
is still completely functional and the module can accept and respond to any AT command. All the other
interfaces are disabled.
The application processor should go in standby (or lowest power consumption mode) as soon as the
SARA-N2 module enters the deep-sleep mode and there is no more data to be transmitted.
At any time the DTE can request the module to send data using the related commands (for more
details, see the SARA-N2 series AT Commands Manual
and the u-blox NB-IoT Application
Development Guide
); these commands automatically force the module to exit the deep-sleep
mode.
1.9.2
Secondary asynchronous serial interface (Secondary UART)
The secondary auxiliary UART interface is a 2-wire unbalanced asynchronous serial interface,
providing:
Trace diagnostic log delivered by the module
The main characteristics of the secondary auxiliary UART interface are:
Serial port with RS-232 functionality working at the V_INT voltage domain (0 V for low data bit or
ON state and 1.8 V, i.e. V_INT, for high data bit or OFF state)
Data line (GPIO1 as module data output)
No flow control
Fixed baud rate: 921600 b/s
Fixed frame format: 8N1 (8 data bits, no parity, 1 stop bit)
☞
Provide a test point connected to the GPIO1 pin for diagnostic purpose.
☞
The trace diagnostic log is temporarily stopped when the module is in deep-sleep mode.
1.9.3
DDC (I
2
C) interface
☞
DDC (I
2
C) interface is not supported in the "02" version of the product.
The SDA and SCL pins represent an I
2
C bus compatible Display Data Channel (DDC) interface,
operating at the V_INT voltage level (1.8 V).
