SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R26
System description
Page 49 of 217
1.9.1.3
UART signal behavior
At the module switch-on, before the UART interface initialization (as described in the power-on sequence
reported in Figure 21 or Figure 22), each pin is first tri-stated and then is set to its related internal reset state
31
. At
the end of the boot sequence, the UART interface is initialized, the module is by default in active mode, and the
UART interface is enabled as AT commands interface.
The configuration and the behavior of the UART signals after the boot sequence are described below. See
section 1.4 for definition and description of module operating modes referred to in this section.
RXD signal behavior
The module data output line (
RXD
) is set by default to the OFF state (high level) at UART initialization. The
module holds
RXD
in the OFF state until the module does not transmit some data.
TXD signal behavior
The module data input line (
TXD
) is set by default to the OFF state (high level) at UART initialization. The
TXD
line is then held by the module in the OFF state if the line is not activated by the DTE: an active pull-up is enabled
inside the module on the
TXD
input.
CTS signal behavior
The module hardware flow control output (
CTS
line) is set to the ON state (low level) at UART initialization.
If the hardware flow control is enabled, as it is by default, the
CTS
line indicates when the UART interface is
enabled (data can be sent and received). The module drives the
CTS
line to the ON state or to the OFF state
when it is either able or not able to accept data from the DTE over the UART (see 1.9.1.4 for more details).
If hardware flow control is enabled, then when the
CTS
line is OFF it does not necessarily mean that the
module is in low power idle mode, but only that the UART is not enabled, as the module could be forced
to stay in active mode for other activities, e.g. related to the network or related to other interfaces.
When the multiplexer protocol is active, the
CTS
line state is mapped to Fcon / Fcoff MUX command for
flow control issues outside the power saving configuration while the physical
CTS
line is still used as a
power state indicator. For more details, see
Mux Implementation Application Note
The
CTS
hardware flow control setting can be changed by AT commands (for more details, see the
u-blox AT
Commands Manual
[3], AT&K, AT\Q, AT+IFC, AT+UCTS AT command).
If the hardware flow control is not enabled, the
CTS
line after the UART initialization behaves as follows:
on SARA-U2 modules product version “00”, the
CTS
is always held in the ON state
on SARA-U2 modules product versions “x3” onwards, the
CTS
behaves as per AT+UCTS command setting
on SARA-G3 modules product versions “00” and “01”, the
CTS
is set in the ON or OFF state accordingly to
the power saving state as shown in Figure 28 if AT+UPSV=2 is set, and it is otherwise held in the ON state
on SARA-G3 modules product versions “02” onwards, the
CTS
behaves as per AT+UCTS command setting
When the power saving configuration is enabled and the hardware flow-control is not implemented in the
DTE/DCE connection, data sent by the DTE can be lost: the first character sent when the module is in the
low power idle mode will not be a valid communication character (see 1.9.1.4 for more details).
31
Refer to the pin description table in the
[1] and
SARA-U2 series Data Sheet
