NINA-B50 series - Hardware integration manual
UBX-22021116 - R02
Module integration
Page 16 of 57
C1-Public
The LPSPI interfaces use the following signals:
Signal Name
Description
LPSPIx_SCK
Serial clock output, up to 24 MHz
LPSPIx_SIN
MISO serial input data/ Data 1 I/O signal
LPSPIx_SOUT
MOSI serial output data/ Data 0 I/O signal
LPSPIx_PCS2
Data 2 I/O signal
LPSPIx_PCS3
Data 3 I/O signal
LPSPIx_PCS0
Chip/Sub node select output, active low, selects which Sub node to communicate with on the bus
Table 3: LPSPI signals in Main mode
☞
For an external storage example and pin assignment information, see also the NINA-B50 data
sheet
2.4.3
Low Power Inter-Integrated Circuit (LPI2C)
NINA-B50 series modules have two instances of the LPI2C module,
LPI2C0
, and
LPI2C1
.
The LPI2C interfaces can operate as both Main and Sub modes on the I2C bus and support standard-
mode (100 kbps), fast-mode (400 kbps), fast-mode plus (1 Mbps) and ultra-fast mode (3.2/3.33
Mbps) operation.
The interface uses the
SCL
signal to clock instructions and data on the
SDA
signal.
•
I2C 2-wire pin configuration:
o
SCL - Clock output in Main node, input in Sub node
o
SDA - Data input/output pin
•
I2C 4-wire pin configuration:
o
SCL - Clock input pin
o
SDA - Data input pin
o
SCLS - Secondary clock line. SCLS output pin in Main node. If LPI2C Main/Sub nodes are
configured to use separate pins, then this is the LPI2C SCL pin for Main node.
o
SDAS - Secondary data line. SDAS output pin in Main node. If LPI2C Main/Sub nodes are
configured to use separate pins, then this is the LPI2C SDA pin for Main node.
2.4.4
Improved Inter-Integrated Circuit (I3C)
NINA-B50 supports a single Improved Inter-Integrated Circuit (I3C) interface,
I3C0
. The I3C bus is
designed to support future sensor interface architectures in Internet-of-Things applications. To
operate in the I3C mode, PV (pull value), PE (pull enable) and PS (pull select) in the corresponding
PORT_PCR
registers should be correctly configured to support I3C pull-up resistor control in advance.
Up to 11 devices can be connected on I3C interface.
2.4.5
Inter-IC Sound interface (I2S)
•
Pin configuration:
o
MCK, Main node clock
o
LRCK, Left Right/Word/Sample clock
o
SCK, Serial clock
o
SDIN, Serial data in
o
SDOUT, Serial data out
