TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R07
Advance Information
Design-in
Page 69 of 158
2
Design-in
2.1
Overview
For an optimal integration of TOBY-L2 and MPCI-L2 series modules in the final application board follow the
design guidelines stated in this section.
Every application circuit must be properly designed to guarantee the correct functionality of the relative
interface, however a number of points require high attention during the design of the application device.
The following list provides a rank of importance in the application design, starting from the highest relevance:
1.
Module antenna connection:
ANT1
,
ANT2
and
ANT_DET
.
Antenna circuit directly affects the RF compliance of the device integrating a TOBY-L2 and MPCI-L2 series
module with applicable certification schemes. Very carefully follow the suggestions provided in the relative
section 2.4 for schematic and layout design.
2.
Module supply:
VCC
or
3.3Vaux
and
GND
pins.
The supply circuit affects the RF compliance of the device integrating a TOBY-L2 and MPCI-L2 series module
with applicable required certification schemes as well as antenna circuit design. Very carefully follow the
suggestions provided in the relative section 2.2.1 for schematic and layout design.
3.
USB interface:
USB_D+
,
USB_D-
pins.
Accurate design is required to guarantee USB 2.0 high-speed interface functionality. Carefully follow the
suggestions provided in the relative section 2.6.1 for schematic and layout design.
4.
SIM interface:
VSIM
,
SIM_CLK
,
SIM_IO
,
SIM_RST
or
UIM_PWR
,
UIM_DATA
,
UIM_CLK
,
UIM_RESET
pins.
Accurate design is required to guarantee SIM card functionality reducing the risk of RF coupling. Carefully
follow the suggestions provided in the relative section 2.5 for schematic and layout design.
5.
SDIO interface:
SDIO_D0
,
SDIO_D1
,
SDIO_D2
,
SDIO_D3
,
SDIO_CLK
,
SDIO_CMD
pins.
Accurate design is required to guarantee SDIO interface functionality. Carefully follow the suggestions
provided in the relative section 2.6.4 for schematic and layout design.
6.
System functions:
RESET_N
or
PERST#
,
PWR_ON
pins.
Accurate design is required to guarantee that the voltage level is well defined during operation. Carefully
follow the suggestions provided in the relative section 2.3 for schematic and layout design.
7.
Other supplies:
V_BCKP
RTC supply and
V_INT
generic digital interfaces supply.
Accurate design is required to guarantee proper functionality. Follow the suggestions provided in the
corresponding sections 2.2.2 and 2.2.3 for schematic and layout design.
8.
Other digital interfaces: UART, I
2
C, I
2
S, Host Select, GPIOs, Mini PCIe specific signals and Reserved pins.
Accurate design is required to guarantee proper functionality. Follow the suggestions provided in sections
2.6.2, 2.6.3, 2.7.1, 2.3.3, 2.8, 2.9 and 2.10 for schematic and layout design.