TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04
Advance Information
System description
Page 24 of 90
Figure 11 shows MPCI-L1 modules power-on sequence from not-powered mode, describing these phases:
•
The external supply is applied to
3.3Vaux
module supply inputs, representing the start-up event.
•
PERST#
pins rise suddenly to high logic level due to internal pull-ups
•
All the module digital pins are held in tri-state until all the internal LDO voltage regulators are turned on.
•
The internal reset signal is held low: the baseband core and all the digital pins are held in reset state.
•
When the internal reset signal is released, the configuration of the module interfaces starts: any digital pin is
set in a proper sequence from the reset state to the default operational configured state. The duration of
this pins’ configuration phase differs within generic digital interfaces and the USB interface due to specific
host / device enumeration timings.
•
The module is fully ready to operate after all interfaces are configured.
3.3Vaux
PERST#
Internal Reset
System State
Digital Pins State
Operational
OFF
Tristate
Internal Reset
Internal Reset
→
Operational
ON
Start-up
event
Start of interface
configuration
0 ms
~6 ms
~5 ms
~20 s
All interfaces
are configured
Figure 11: MPCI-L1 series power-on sequence description
The Internal Reset signal is not available on a module pin, but the host application can monitor the USB
interface to sense the start of the MPCI-L1 series module power-on sequence: the module, as USB device,
informs the host of the attach event via a reply on its status change pipe for proper bus enumeration
process according to
Universal Serial Bus Revision 2.0 specification
Before a MPCI-L1 series module is fully ready to operate, the host application processor should not send
any AT command over the AT communication interface (USB) of the module.
