TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04
Advance Information
System description
Page 13 of 90
1.3.2
MPCI-L1 series pin assignment
Table 4 lists the pin-out of the MPCI-L100 module, with pins grouped by function.
Function
Pin Name
Pin No
I/O
Description
Remarks
Power
3.3Vaux
2, 24, 39,
41, 52
I
Module supply input
3.3Vaux
pins are internally connected each other.
3.3Vaux
supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for functional description and
requirements for the
3.3Vaux
module supply.
See section 2.2.1 for external circuit design-in.
GND
4, 9, 15, 18,
21, 26, 27,
29, 34, 35,
37, 40, 43, 50
N/A
Ground
GND
pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
Auxiliary
Signals
PERST#
22
I
External reset input
Internal
10 k
Ω
pull-up to 2.5 V supply.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
Antennas
ANT1
U.FL
I/O
Primary antenna
Main Tx / Rx antenna interface.
50
Ω
nominal characteristic impedance.
Antenna circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.7 for functional description / requirements.
See section 2.4 for external circuit design-in.
ANT2
U.FL
I
Secondary antenna
Rx only for DL MIMO 2x2 configuration.
50
Ω
nominal characteristic impedance.
Antenna circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.7 for functional description / requirements
See section 2.4 for external circuit design-in.
SIM
UIM_PWR
8
O
SIM supply output
UIM_PWR
= 1.8 V / 3 V automatically generated
according to the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_DATA
10
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k
Ω
pull-up to
UIM_PWR
.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_CLK
12
O
SIM clock
5 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_RESET
14
O
SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
