LISA-C2 series and FW75-C200 - System Integration Manual
UBX-13000620 - R21
Early Production Information
Design-In
Page 53 of 103
2
Design-In
2.1
Design-in checklist
2.1.1
Schematic checklist
The following are the most important points for a simple schematic check:
DC supply must provide a nominal voltage at
VCC
pin above the minimum operating range limit.
DC supply must be capable of supporting 1.2 A, providing a voltage at
VCC
pin above the minimum
operating range limit and with a maximum 250 mV voltage drop from the nominal value.
VCC
supply should be clean, with very low ripple/noise: suggested passive filtering parts can be inserted.
Sudden momentary power loss to host application is properly handled to either provide the C200
module with adequate supply during loss or to turn off/remove supply 2 seconds or longer to permit the
module properly reach the powered-off state.
Connect only one DC supply to
VCC
: different DC supply systems are mutually exclusive.
Don’t apply loads which might exceed the limit for maximum available current from
V_INT
supply.
Check that voltage level of any connected pin does not exceed the relative operating range.
Check that there is no back-feeding voltage provided to any UART and/or I2C lines
Check that there is no voltage input coming through the V_INT Line
Check that the Power-on sequence works as the option selected, and no voltage is back-fed prior to
C200 modules initialization
Capacitance and series resistance must be limited on each SIM signal to match the SIM specifications.
Insert the suggested low capacitance ESD protection and passive filtering parts on each SIM signal.
Check UART signals direction, since the signal names follow the
ITU-T V.24 Recommendation
Provide appropriate access to USB interface and/or to UART
RxD
,
TxD
lines and access to
PWR_ON
and/or
HW_SHUTDOWN
lines on the application board in order to flash/upgrade the module firmware.
Provide appropriate access to USB interface and/or to UART
RxD
,
TxD
,
CTS
,
RTS
lines for debugging.
Add a proper pull-up resistor to a proper supply on each DDC (I
2
C) interface line, if the interface is used.
Capacitance and series resistance must be limited on each line of the DDC interface.
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k
Ω
resistor on
the board in series to the GPIO when those are used to drive LEDs.
Insert the suggested passive filtering parts on each used analog audio line.
Provide proper precautions for ESD immunity as required on the application board.
All unused pins can be left floating on the application board Layout checklist
2.1.2
Layout checklist
The following are the most important points for a simple layout check:
Check 50
Ω
nominal characteristic impedance of the RF transmission line connected to
ANT
coax
connector or Printed Circuit Board 50 transmission line impedance for LISA-C200
Follow the recommendations of the antenna producer for correct antenna installation and deployment.
Ensure no coupling occurs with other noisy or sensitive signals (primarily SIM signals).
VCC
line should be wide and short.
Ensure proper grounding.
Consider “No-routing” areas for the Data Module footprint.
Optimize placement for minimum length of RF line and closer path from DC source for
VCC
.
