JODY-W2 - System integration manual
UBX-18068879 - R14
System description
Page 14 of 84
C1 - Public
Figure 3: Power-up sequences for VIO=3.3 V or 1.8 V
Figure
4
: Optional power-up sequences for VIO=1.8 V
Reset
The internal power-up reset logic means that an external reset is not necessary for proper operation,
although it can be used by the host controller through
PDn
and
CORE_PDn
in case of abnormal module
behavior.
JODY-W2 is reset to its default operating state by any of the following events:
•
Module is powered on and internal voltages are good
•
Software or firmware reset
•
Asserting
PDn
and
CORE_PDn
Power-off sequence
It is advisable to ramp down
VBAT
followed
by
1V8
.
PDn
must be asserted when powering down the
module.
One of the following conditions must be met before Power-on Reset is triggered again:
•
PDn
and
CORE_PDn
asserted
•
PDn
asserted and
1V8
discharged to less than 0.2 V
